re PR target/25864 (Enable IBM long double format in 32-bit PowerPC Linux)

2006-02-03  Andreas Krebbel  <krebbel1@de.ibm.com>
            Ulrich Weigand  <uweigand@de.ibm.com>

	PR target/25864
	* config/s390/2084.md ("x_fsimptf", "x_fmultf", "x_fdivtf",
	"x_floadtf", "x_ftrunctf", "x_ftruncdf"): New insn reservations.
	* config/s390/fixdfdi.h (__fixunstfdi, __fixtfdi): New functions.
	* config/s390/s390.c (struct processor_costs): Add mxbr, sqxbr, dxbr 
	and dxr fields.
	(z900_cost, z990_cost, z9_109_cost): Values for the new fields added.
	(s390_rtx_costs): Use the new fields to calculate rtx costs.
	(s390_secondary_input_reload_class, s390_secondary_output_reload_class):
	Define secondary reloads for TFmode moves.
	(constant_modes): Add TFmode.
	(NR_C_MODES): Set to 8.
	* config/s390/s390.h (TARGET_CPU_CPP_BUILTINS): Add __LONG_DOUBLE_128__
	builtin define.
	(LONG_DOUBLE_TYPE_SIZE): Set to 128 or 64.
	(LIBGCC2_LONG_DOUBLE_TYPE_SIZE, WIDEST_HARDWARE_FP_SIZE): Define.
	(HARD_REGNO_NREGS, HARD_REGNO_MODE_OK, CLASS_MAX_NREGS, 
	CANNOT_CHANGE_MODE_CLASS): Consider TFmode.
	* config/s390/s390.md ("type" attribute): Add fsimptf, floadtf, fmultf, 
	fdivtf, fsqrttf, ftrunctf, ftruncdf as possible values.
	(FPR mode macro): Add TFmode.
	(DSF mode macro): New.
	(<de>, <dee> mode attributes): Removed.
	(<xde>, <xdee>, <RRe>, <RXe>, <Rf> mode attributes): New.
	("*cmp<mode>_ccs_0", "*cmp<mode>_ccs_0_ibm", "*cmp<mode>_ccs", 
	"*cmp<mode>_ccs_ibm", "fix_trunc<FPR:mode><GPR:mode>2_ieee", 
	"floatdi<mode>2", "floatsi<mode>2_ieee", "*add<mode>3", 
	"*add<mode>3_cc", "*add<mode>3_cconly", "*add<mode>3_ibm", 
	"*sub<mode>3", "*sub<mode>3_cc", "*sub<mode>3_cconly", 
	"*sub<mode>3_ibm", "*mul<mode>3_ibm", "*fmadd<mode>", "*fmsub<mode>",
	"*div<mode>3", "*div<mode>3_ibm", "*neg<mode>2_cc", 
	"*neg<mode>2_cconly", "*neg<mode>2", "*neg<mode>2_ibm", 
	"*abs<mode>2_cc", "*abs<mode>2_cconly", "*abs<mode>2",
	"*abs<mode>2_ibm", "*negabs<mode>2_cc", "*negabs<mode>2_cconly", 
	"*negabs<mode>2", "sqrt<mode>2"):
	Changed <de> to <xde>. R constraint replaced by <Rf>.
	("*mul<mode>3"): Changed <dee> to <xdee>. R constraint replaced by 
	<Rf>.
	("fix_trunc<FPR:mode>di2"): 'FPR:' removed.
        ("*fmadd<mode>", "*fmsub<mode>"): FPR mode replaced by DSF.
	("*movtf_64", "*movtf_31"): New insn definitions followed by 5 
	splitters.
	("movtf", "reload_outtf", "reload_intf", "trunctfdf2", "trunctfsf2", 
	"extenddftf2", "extendsftf2"): New expanders.
	("*trunctfdf2_ieee", "*trunctfdf2_ibm", "*trunctfsf2_ieee", 
	"*trunctfsf2_ibm", "*extenddftf2_ieee", "*extenddftf2_ibm",
	"*extendsftf2_ieee", "*extendsftf2_ibm"): New insn patterns.
	* config/s390/s390.opt (mlong-double-128, mlong-double-64):
	New options.
	* config/s390/t-crtstuff (TARGET_LIBGCC2_CFLAGS): Macro defined.
	* config/s390/libgcc-glibc.ver (__divtc3, __multc3, __powitf2, 
	__fixtfti, __fixunstfti, __floattitf, __fixtfdi, __fixunstfdi,
	__floatditf): Add a GCC_4.1.0 symbol version tag.
	* doc/invoke.texi (-mlong-double-128, -mlong-double-64): Document
	the new options.



Co-Authored-By: Ulrich Weigand <uweigand@de.ibm.com>

From-SVN: r110539

1 files changed, 35 insertions, 13 deletions

diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h
index d8d1d1990d0..1a61158ba04 100644
--- a/gcc/config/s390/s390.h
+++ b/gcc/config/s390/s390.h
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler, for IBM S/390
-   Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
+   Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
    Free Software Foundation, Inc.
    Contributed by Hartmut Penner (hpenner@de.ibm.com) and
                   Ulrich Weigand (uweigand@de.ibm.com).
@@ -93,6 +93,8 @@ extern enum processor_flags s390_arch_flags;
       builtin_define ("__s390__");			\
       if (TARGET_64BIT)					\
         builtin_define ("__s390x__");			\
+      if (TARGET_LONG_DOUBLE_128)			\
+        builtin_define ("__LONG_DOUBLE_128__");		\
     }							\
   while (0)
 
@@ -216,7 +218,18 @@ if (INTEGRAL_MODE_P (MODE) &&	        	    	\
 #define LONG_LONG_TYPE_SIZE 64
 #define FLOAT_TYPE_SIZE 32
 #define DOUBLE_TYPE_SIZE 64
-#define LONG_DOUBLE_TYPE_SIZE 64  /* ??? Should support extended format.  */
+#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
+
+/* Define this to set long double type size to use in libgcc2.c, which can
+   not depend on target_flags.  */
+#ifdef __LONG_DOUBLE_128__
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
+#else
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
+#endif
+
+/* Work around target_flags dependency in ada/targtyps.c.  */
+#define WIDEST_HARDWARE_FP_SIZE 64
 
 /* We use "unsigned char" as default.  */
 #define DEFAULT_SIGNED_CHAR 0
@@ -334,28 +347,34 @@ if (INTEGRAL_MODE_P (MODE) &&	        	    	\
    Floating point modes <= word size fit into any FPR or GPR.
    Floating point modes > word size (i.e. DFmode on 32-bit) fit
    into any FPR, or an even-odd GPR pair.
+   TFmode fits only into an even-odd FPR pair.
 
    Complex floating point modes fit either into two FPRs, or into
    successive GPRs (again starting with an even number).
+   TCmode fits only into two successive even-odd FPR pairs.
 
    Condition code modes fit only into the CC register.  */
 
 #define HARD_REGNO_NREGS(REGNO, MODE)                           \
   (FP_REGNO_P(REGNO)?                                           \
-    (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :      \
+   (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ?                \
+    2 * ((GET_MODE_SIZE(MODE) / 2 + 8 - 1) / 8) : 		\
+    ((GET_MODE_SIZE(MODE) + 8 - 1) / 8)) :			\
    GENERAL_REGNO_P(REGNO)?                                      \
     ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
    ACCESS_REGNO_P(REGNO)?					\
-    ((GET_MODE_SIZE(MODE)+4-1) / 4) : 				\
+    ((GET_MODE_SIZE(MODE) + 4 - 1) / 4) : 			\
    1)
 
 #define HARD_REGNO_MODE_OK(REGNO, MODE)                             \
   (FP_REGNO_P(REGNO)?                                               \
-   ((MODE) == SImode || (MODE) == DImode ||                         \
-    GET_MODE_CLASS(MODE) == MODE_FLOAT ||                           \
-    GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) :                   \
+   (((MODE) == SImode || (MODE) == DImode                           \
+     || GET_MODE_CLASS(MODE) == MODE_FLOAT                          \
+     || GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT)                 \
+    && (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1))) :    \
    GENERAL_REGNO_P(REGNO)?                                          \
-    (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) :        \
+   ((HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1))	    \
+    && (((MODE) != TFmode && (MODE) != TCmode) || TARGET_64BIT)) :  \
    CC_REGNO_P(REGNO)?                                               \
      GET_MODE_CLASS (MODE) == MODE_CC :                             \
    FRAME_REGNO_P(REGNO)?                                            \
@@ -376,7 +395,9 @@ if (INTEGRAL_MODE_P (MODE) &&	        	    	\
    in a register of class CLASS.  */
 #define CLASS_MAX_NREGS(CLASS, MODE)   					\
      ((CLASS) == FP_REGS ? 						\
-      (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) :  		\
+      (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ?                     \
+       2 * (GET_MODE_SIZE (MODE) / 2 + 8 - 1) / 8 :		        \
+       (GET_MODE_SIZE (MODE) + 8 - 1) / 8) :				\
       (CLASS) == ACCESS_REGS ?						\
       (GET_MODE_SIZE (MODE) + 4 - 1) / 4 :				\
       (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
@@ -386,10 +407,11 @@ if (INTEGRAL_MODE_P (MODE) &&	        	    	\
    cannot use SUBREGs to switch between modes in FP registers.
    Likewise for access registers, since they have only half the
    word size on 64-bit.  */
-#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)		\
-  (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)			\
-   ? reg_classes_intersect_p (FP_REGS, CLASS)			\
-     || reg_classes_intersect_p (ACCESS_REGS, CLASS) : 0)
+#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)		        \
+  (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)			        \
+   ? ((reg_classes_intersect_p (FP_REGS, CLASS)				\
+       && (GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8))		\
+      || reg_classes_intersect_p (ACCESS_REGS, CLASS)) : 0)
 
 /* Register classes.  */