* config/rx/predicates.md (rx_store_multiple_vector): Reverse

        order of expected registers.
        (rx_load_multiple_vector): Likewise.
        (rx_rtsd_vector): Likewise.
        * config/rx/rx.c (rx_cpu_type): New variable.
        (rx_print_operand): Fix bug printing 64-bit constant values.
        (rx_emit_stack_pushm): Reverse order of pushed registers.
        (gen_rx_store_vector): Likewise.
        (is_fast_interrupt_func): Only accept "fast_interrupt" as the
        attribute name.
        (is_exception_func): Rename to is_interrupt_func and only accept
        "interrupt" as the attribute name.
        (rx_get_stack_layout): Use new function name.
        (rx_func_attr_inlinable): Likewise.
        (rx_attribute_table): Remove "exception".
        (rx_expand_prologue): If necessary push the accumulator register
        in the prologue of interrupt functions.
        (rx_expand_epilogue): If necessary pop the accumulator.
        (rx_builtins): Add RX_BUILTIN_MVTIPL.
        (rx_expand_builtin_stz): Remove.
        (rx_expand_builtin_mvtipl): New function.
        (rx_init_builtins): Handle RX_BUILTIN_MVTIPL.
        (rx_expand_builtin): Likewise.
        (rx_enable_fpu): New variable.
        (rx_handle_option): Handle -fpu, -nofpu, -mcpu and -patch.
        * config/rx/rx.h (TARGET_CPU_CPP_BUILTINS): Assert machine based
        on rx_cpu_type.  Define __RX_FPU_INSNS__ if FPU insns are allowed.
        (enum rx_cpu_types): Define.
        (ASM_SPEC): Pass -m32bit-doubles on to assembler.
        (INCOMING_FRAME_SP_OFFSET): Define.
        (ARG_POINTER_CFA_OFFSET): Define.
        (FRAME_POINTER_CFA_OFFSET): Define.
        (OVERRIDE_OPTIONS): Enable fast math if RX FPU insns are enabled.
        (ALLOW_RX_FPU_INSNS): Define.
        * config/rx/rx.md: Test ALLOW_RX_FPU_INSNS instead of
        fast_math_flags_set_p.
        (UNSPEC_BUILTIN_MVTIPL): Define.
        (revl): Rename to bswapsi2.
        (bswaphi2): New pattern.
        (mvtachi): Mark as volatile because it uses a register unknown to
        GCC.
        (mvtaclo): Likewise.
        (racw): Likewise.
        (mvtc): Remove clobber of cc0.
        (mvtcp): Delete.
        (opecp): Delete.
        * config/rx/rx.opt (mieee): Remove.
        (fpu): Add.
        (nofpu): Add.
        (mcpu=): Add.
        (patch=): Add.
        (msave-acc-in-interrupts): Add.
        * config/rx/t-rx (MULTILIB_OPTIONS): Change default to 64bit
        doubles.
        (MULTILIB_DIRS): Likewise.
        (MULTILIB_MATCHES): Treat -fpu as an alias for -m32bit-doubles.
        * doc/extend.texi: Remove description of "exception" function
        attribute.
        * doc/invoke.texi: Document -fpu, -nofpu, -mcpu=, -patch= and
        -msave-acc-in-interrupts options.

        * gcc.target/rx/builtins,c: Remove redundant tests.
        Add test of MVTIPL instruction.
        * gcc.target/rx/interrupts.c: Use fast_interrupt and interrupt
        function attributes.  Add -msave-acc-in-interrupts option to the
        command line.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@153853 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 29 insertions, 5 deletions

diff --git a/gcc/config/rx/rx.opt b/gcc/config/rx/rx.opt
index 83e75bfba76..768d565b478 100644
--- a/gcc/config/rx/rx.opt
+++ b/gcc/config/rx/rx.opt
@@ -19,13 +19,31 @@
 ; <http://www.gnu.org/licenses/>.
 ;---------------------------------------------------
 
+m32bit-doubles
+Target RejectNegative Mask(32BIT_DOUBLES)
+Stores doubles in 32 bits.
+
 m64bit-doubles
-Target RejectNegative Mask(64BIT_DOUBLES)
-Store doubles in 64 bits.
+Target RejectNegative InverseMask(32BIT_DOUBLES)
+Store doubles in 64 bits.  This is the default.
 
-m32bit-doubles
-Target RejectNegative InverseMask(64BIT_DOUBLES)
-Stores doubles in 32 bits.  This is the default.
+fpu
+Target RejectNegative Mask(32BIT_DOUBLES) MaskExists
+Enable the use of RX FPU instructions.
+
+nofpu
+Target RejectNegative InverseMask(32BIT_DOUBLES) MaskExists
+Disable the use of RX FPU instructions.
+
+;---------------------------------------------------
+
+mcpu=
+Target RejectNegative Joined Var(rx_cpu_name)
+Specify the target RX cpu type.
+
+patch=
+Target RejectNegative Joined Var(rx_cpu_name)
+Alias for -mcpu.
 
 ;---------------------------------------------------
 
@@ -72,3 +90,9 @@ Maximum size in bytes of constant values allowed as operands.
 mint-register=
 Target RejectNegative Joined UInteger Var(rx_interrupt_registers) Init(0)
 Specifies the number of registers to reserve for interrupt handlers.
+
+;---------------------------------------------------
+
+msave-acc-in-interrupts
+Target Mask(SAVE_ACC_REGISTER)
+Specifies whether interrupt functions should save and restore the accumulator register.