diff options
author | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-03-02 19:17:04 +0000 |
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committer | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-03-02 19:17:04 +0000 |
commit | 7315f1c50f3bbf3a813ddbe6aa41b795a3d6d556 (patch) | |
tree | 072400f8a14822a155cae3fbcf83ad1c0181d565 /gcc/config/rs6000/vsx.md | |
parent | d1173646abec47fefccf9bdae9b67b856adca663 (diff) | |
download | gcc-7315f1c50f3bbf3a813ddbe6aa41b795a3d6d556.tar.gz |
2017-03-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/vector.md (vector_ne_<mode>_p): Correct operand
numbers.
(vector_ae_<mode>_p): Likewise.
(vector_nez_<mode>_p): Likewise.
(vector_ne_v2di_p): Likewise.
(vector_ae_v2di_p): Likewise.
(vector_ne_<mode>_p): Likewise.
* config/rs6000/vsx.md (vsx_tsqrt<mode>2_fg): Correct operand
numbers.
(vsx_tsqrt<mode>2_fe): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@245849 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/vsx.md')
-rw-r--r-- | gcc/config/rs6000/vsx.md | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 111c2e8214b..aabc8f61ece 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1383,28 +1383,28 @@ ;; *tsqrt* returning the fg flag (define_expand "vsx_tsqrt<mode>2_fg" - [(set (match_dup 3) + [(set (match_dup 2) (unspec:CCFP [(match_operand:VSX_B 1 "vsx_register_operand" "")] UNSPEC_VSX_TSQRT)) (set (match_operand:SI 0 "gpc_reg_operand" "") - (gt:SI (match_dup 3) + (gt:SI (match_dup 2) (const_int 0)))] "VECTOR_UNIT_VSX_P (<MODE>mode)" { - operands[3] = gen_reg_rtx (CCFPmode); + operands[2] = gen_reg_rtx (CCFPmode); }) ;; *tsqrt* returning the fe flag (define_expand "vsx_tsqrt<mode>2_fe" - [(set (match_dup 3) + [(set (match_dup 2) (unspec:CCFP [(match_operand:VSX_B 1 "vsx_register_operand" "")] UNSPEC_VSX_TSQRT)) (set (match_operand:SI 0 "gpc_reg_operand" "") - (eq:SI (match_dup 3) + (eq:SI (match_dup 2) (const_int 0)))] "VECTOR_UNIT_VSX_P (<MODE>mode)" { - operands[3] = gen_reg_rtx (CCFPmode); + operands[2] = gen_reg_rtx (CCFPmode); }) (define_insn "*vsx_tsqrt<mode>2_internal" |