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authorUros Bizjak <ubizjak@gmail.com>2017-05-31 20:33:30 +0200
committerUros Bizjak <uros@gcc.gnu.org>2017-05-31 20:33:30 +0200
commit49fe4867264fee03accf55f7dc711a9cf6926627 (patch)
tree3010371faa368dc182aeb6680878b21b95a37278 /gcc/config/rs6000/vector.md
parentdc7401c0c65065f25aa6acfc10430417de727f8a (diff)
downloadgcc-49fe4867264fee03accf55f7dc711a9cf6926627.tar.gz
i386.md (*zero_extendsidi2): Enable alternative (?r, *Yj) also for 32bit target.
* config/i386/i386.md (*zero_extendsidi2): Enable alternative (?r, *Yj) also for 32bit target. Update insn attributes. (zero-extendsidi2 splitter): Allow all registers for operand 1. From-SVN: r248757
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