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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2015-04-07 03:36:05 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2015-04-07 03:36:05 +0000 |
| commit | 90e0a7020eeeb72e95afe16b392440dba78f19a1 (patch) | |
| tree | bbc99094a05e223b0369ecd5f3e1d21e1ffd820b /gcc/config/rs6000/rs6000.md | |
| parent | 68b3d8c98793a7b58871aa91f2ad9b511fe63209 (diff) | |
| download | gcc-90e0a7020eeeb72e95afe16b392440dba78f19a1.tar.gz | |
re PR target/65614 (PowerPC VSX systems should use XSCPSGNDP to copy scalar fp data to/from Altivec registers)
[gcc]
2015-04-06 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/65614
* config/rs6000/rs6000.c (struct processor_costs): Add cost field
for SF->DF conversions to make FLOAT_EXTEND more expensive, so
that LFD is used to load double constants instead of LFS. Add
defaults for all costs structures. Add comments for missing
initialization fields.
(size32_cost): Likewise.
(size64_cost): Likewise.
(rs64a_cost): Likewise.
(mpccore_cost): Likewise.
(ppc403_cost): Likewise.
(ppc405_cost): Likewise.
(ppc440_cost): Likewise.
(ppc476_cost): Likewise.
(ppc601_cost): Likewise.
(ppc603_cost): Likewise.
(ppc604_cost): Likewise.
(ppc604e_cost): Likewise.
(ppc620_cost): Likewise.
(ppc630_cost): Likewise.
(ppccell_cost): Likewise.
(ppc750_cost): Likewise.
(ppc7450_cost): Likewise.
(ppc8540_cost): Likewise.
(ppce300c2c3_cost): Likewise.
(ppce500mc_cost): Likewise.
(ppce500mc64_cost): Likewise.
(ppce5500_cost): Likewise.
(ppce6500_cost): Likewise.
(titan_cost): Likewise.
(power4_cost): Likewise.
(power6_cost): Likewise.
(power7_cost): Likewise.
(power8_cost): Likewise.
(ppca2_cost): Likewise.
(rs6000_rtx_costs): Make FLOAT_EXTEND use SFDF_convert field.
* config/rs6000/rs6000.md (extendsfdf2_fpr): Generate XSCPSGNDP
instead of XXLOR to copy SFmode to clear out dirty bits created
when SFmode denormals are generated.
(mov<mode>_hardfloat, FMOVE32 case): Likewise.
(truncdfsf2_fpr): Add support for ISA 2.07 XSRSP instruction.
[gcc/testsuite]
2015-04-06 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/65614
* gcc.target/powerpc/compress-float-ppc-pic.c: Run test on power5
to get floating point compression.
* gcc.target/powerpc/compress-foat-ppc.c: Likewise.
From-SVN: r221888
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 5025e6080a3..0178bf45b00 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5222,7 +5222,7 @@ fmr %0,%1 lfs%U1%X1 %0,%1 # - xxlor %x0,%x1,%x1 + xscpsgndp %x0,%x1,%x1 lxsspx %x0,%y1" "&& reload_completed && REG_P (operands[1]) && REGNO (operands[0]) == REGNO (operands[1])" [(const_int 0)] @@ -5230,7 +5230,7 @@ emit_note (NOTE_INSN_DELETED); DONE; } - [(set_attr "type" "fp,fp,fpload,fp,vecsimple,fpload")]) + [(set_attr "type" "fp,fp,fpload,fp,fp,fpload")]) (define_expand "truncdfsf2" [(set (match_operand:SF 0 "gpc_reg_operand" "") @@ -5239,10 +5239,12 @@ "") (define_insn "*truncdfsf2_fpr" - [(set (match_operand:SF 0 "gpc_reg_operand" "=f") - (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "d")))] + [(set (match_operand:SF 0 "gpc_reg_operand" "=f,wy") + (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "d,ws")))] "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT" - "frsp %0,%1" + "@ + frsp %0,%1 + xsrsp %x0,%x1" [(set_attr "type" "fp")]) ;; This expander is here to avoid FLOAT_WORDS_BIGENDIAN tests in @@ -8058,7 +8060,7 @@ lwz%U1%X1 %0,%1 stw%U0%X0 %1,%0 fmr %0,%1 - xxlor %x0,%x1,%x1 + xscpsgndp %x0,%x1,%x1 xxlxor %x0,%x0,%x0 li %0,0 <f32_li> @@ -8070,7 +8072,7 @@ mt%0 %1 mf%1 %0 nop" - [(set_attr "type" "*,load,store,fp,vecsimple,vecsimple,integer,fpload,fpstore,fpload,fpstore,mftgpr,mffgpr,mtjmpr,mfjmpr,*") + [(set_attr "type" "*,load,store,fp,fp,vecsimple,integer,fpload,fpstore,fpload,fpstore,mftgpr,mffgpr,mtjmpr,mfjmpr,*") (set_attr "length" "4")]) (define_insn "*mov<mode>_softfloat" |