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| author | Segher Boessenkool <segher@kernel.crashing.org> | 2014-11-28 17:25:33 +0100 |
|---|---|---|
| committer | Segher Boessenkool <segher@gcc.gnu.org> | 2014-11-28 17:25:33 +0100 |
| commit | 8760be8546edd0941c1d62dd47e5130fae5df953 (patch) | |
| tree | 5e61b6af3f5176dfed13219a158b937d72fe26df /gcc/config/rs6000/rs6000.md | |
| parent | 6a4da643ca8f52e973b89a76057b76fde7f0a708 (diff) | |
| download | gcc-8760be8546edd0941c1d62dd47e5130fae5df953.tar.gz | |
re PR target/64093 (ICE error: unrecognizable insn with -mcpu=cell)
PR target/64093
* config/rs6000/rs6000.md (and<mode>3): Don't generate
and<mode>3_imm unless rs6000_gen_cell_microcode is true.
From-SVN: r218164
Diffstat (limited to 'gcc/config/rs6000/rs6000.md')
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index c8c3a680d82..f3b5aae18e6 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2646,8 +2646,13 @@ if (logical_const_operand (operands[2], <MODE>mode) && !any_mask_operand (operands[2], <MODE>mode)) { - emit_insn (gen_and<mode>3_imm (operands[0], operands[1], operands[2])); - DONE; + if (rs6000_gen_cell_microcode) + { + emit_insn (gen_and<mode>3_imm (operands[0], operands[1], operands[2])); + DONE; + } + else + operands[2] = force_reg (<MODE>mode, operands[2]); } if ((<MODE>mode == DImode && !and64_2_operand (operands[2], <MODE>mode)) |