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authormeissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>2012-10-02 18:08:02 +0000
committermeissner <meissner@138bc75d-0d04-0410-961f-82ee72b054a4>2012-10-02 18:08:02 +0000
commit61e26f31fae6b504f618bed1f6eb41018572ecc3 (patch)
treeb71704cef58ddf578204641fb40e495212684b06 /gcc/config/rs6000/rs6000.c
parent5785406dd45773655051e9a6cd3ad548f0779179 (diff)
downloadgcc-61e26f31fae6b504f618bed1f6eb41018572ecc3.tar.gz
If no -mcpu=<xxx> or implicit cpu via --with-cpu=<xxx> configure option, inhereit all TARGET_DEFAULT bits.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@191993 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/rs6000.c')
-rw-r--r--gcc/config/rs6000/rs6000.c29
1 files changed, 21 insertions, 8 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index a3f99092900..3e3d55324e9 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -2446,21 +2446,34 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_cpu_index = cpu_index = main_target_opt->x_rs6000_cpu_index;
have_cpu = true;
}
+ else if (implicit_cpu)
+ {
+ rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (implicit_cpu);
+ have_cpu = true;
+ }
else
{
- const char *default_cpu =
- (implicit_cpu ? implicit_cpu
- : (TARGET_POWERPC64 ? "powerpc64" : "powerpc"));
-
+ const char *default_cpu = (TARGET_POWERPC64 ? "powerpc64" : "powerpc");
rs6000_cpu_index = cpu_index = rs6000_cpu_name_lookup (default_cpu);
- have_cpu = implicit_cpu != 0;
+ have_cpu = false;
}
gcc_assert (cpu_index >= 0);
- target_flags &= ~set_masks;
- target_flags |= (processor_target_table[cpu_index].target_enable
- & set_masks);
+ /* If we have a cpu, either through an explicit -mcpu=<xxx> or if the
+ compiler was configured with --with-cpu=<xxx>, replace all of the ISA bits
+ with those from the cpu, except for options that were explicitly set. If
+ we don't have a cpu, do not override the target bits set in
+ TARGET_DEFAULT. */
+ if (have_cpu)
+ {
+ target_flags &= ~set_masks;
+ target_flags |= (processor_target_table[cpu_index].target_enable
+ & set_masks);
+ }
+ else
+ target_flags |= (processor_target_table[cpu_index].target_enable
+ & ~target_flags_explicit);
if (rs6000_tune_index >= 0)
tune_index = rs6000_tune_index;