diff options
| author | bergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-06-28 01:28:28 +0000 |
|---|---|---|
| committer | bergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-06-28 01:28:28 +0000 |
| commit | 35fd0c100081827c7e16dbb3492431d3eb3125f5 (patch) | |
| tree | 8b84ddf3424e979b04f60e7c78a033030c2fd33e /gcc/config/rs6000/rs6000-cpus.def | |
| parent | 01b61153d1fbaa09c467636b5b602d478e4c320b (diff) | |
| download | gcc-35fd0c100081827c7e16dbb3492431d3eb3125f5.tar.gz | |
gcc/
PR target/71656
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
OPTION_MASK_P9_DFORM_VECTOR.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
disable -mpower9-dform-vector when using reload.
(quad_address_p): Remove 'gpr_p' argument and all associated code.
New 'strict' argument. Update all callers. Add strict addressing
support.
(rs6000_legitimate_offset_address_p): Remove call to
virtual_stack_registers_memory_p.
(rs6000_legitimize_reload_address): Add quad address support.
(rs6000_legitimate_address_p): Move call to quad_address_p above
call to virtual_stack_registers_memory_p. Adjust quad_address_p args
to account for new strict usage.
(rs6000_output_move_128bit): Adjust quad_address_p args to account
for new strict usage.
* config/rs6000/predicates.md (quad_memory_operand): Likewise.
gcc/testsuite/
PR target/71656
* gcc.target/powerpc/pr71656-1.c: New test.
* gcc.target/powerpc/pr71656-2.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@237811 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/rs6000-cpus.def')
| -rw-r--r-- | gcc/config/rs6000/rs6000-cpus.def | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index a67b2d91b4e..8fbf1b94268 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -61,14 +61,14 @@ | OPTION_MASK_UPPER_REGS_SF) /* Add ISEL back into ISA 3.0, since it is supposed to be a win. Do not add - P9_MINMAX until the hardware that supports it is available. Do not add - P9_DFORM_VECTOR until LRA is the default register allocator. */ + P9_MINMAX until the hardware that supports it is available. */ #define ISA_3_0_MASKS_SERVER (ISA_2_7_MASKS_SERVER \ | OPTION_MASK_FLOAT128_HW \ | OPTION_MASK_ISEL \ | OPTION_MASK_MODULO \ | OPTION_MASK_P9_FUSION \ | OPTION_MASK_P9_DFORM_SCALAR \ + | OPTION_MASK_P9_DFORM_VECTOR \ | OPTION_MASK_P9_VECTOR) #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC) |