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| author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2013-07-31 20:04:07 +0000 |
|---|---|---|
| committer | Michael Meissner <meissner@gcc.gnu.org> | 2013-07-31 20:04:07 +0000 |
| commit | d86e633abc4aeb1be6c443b3dc3593629491a838 (patch) | |
| tree | 8fca80180a443821ea64db1f6fcab18e36937b55 /gcc/config/rs6000/predicates.md | |
| parent | b26e3fc277ea869668b129563f9276caace5e5d9 (diff) | |
| download | gcc-d86e633abc4aeb1be6c443b3dc3593629491a838.tar.gz | |
predicates.md (fusion_gpr_addis): New predicates to support power8 load fusion.
[gcc]
2013-07-31 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/predicates.md (fusion_gpr_addis): New predicates
to support power8 load fusion.
(fusion_gpr_mem_load): Likewise.
* config/rs6000/rs6000-modes.def (PTImode): Update a comment.
* config/rs6000/rs6000-protos.h (fusion_gpr_load_p): New
declarations for power8 load fusion.
(emit_fusion_gpr_load): Likewise.
* config/rs6000/rs6000.c (rs6000_option_override_internal): If
tuning for power8, turn on fusion mode by default. Turn on sign
extending fusion mode if normal fusion mode is on, and we are at
-O2 or -O3.
(fusion_gpr_load_p): New function, return true if we can fuse an
addis instruction with a dependent load to a GPR.
(emit_fusion_gpr_load): Emit the instructions for power8 load
fusion to GPRs.
* config/rs6000/vsx.md (VSX_M2): New iterator for fusion
peepholes.
(VSX load fusion peepholes): New peepholes to fuse together an
addi instruction with a VSX load instruction.
* config/rs6000/rs6000.md (GPR load fusion peepholes): New
peepholes to fuse an addis instruction with a load to a GPR base
register. If we are supporting sign extending fusions, convert
sign extending loads to zero extending loads and add an explicit
sign extension.
[gcc/testsuite]
2013-07-31 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/fusion.c: New file, test power8 fusion
support.
From-SVN: r201385
Diffstat (limited to 'gcc/config/rs6000/predicates.md')
| -rw-r--r-- | gcc/config/rs6000/predicates.md | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 18912f15a4a..09013c3d553 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -1702,3 +1702,91 @@ return GET_CODE (op) == UNSPEC && XINT (op, 1) == UNSPEC_TOCREL; }) + +;; Match the first insn (addis) in fusing the combination of addis and loads to +;; GPR registers on power8. +(define_predicate "fusion_gpr_addis" + (match_code "const_int,high,plus") +{ + HOST_WIDE_INT value; + rtx int_const; + + if (GET_CODE (op) == HIGH) + return 1; + + if (CONST_INT_P (op)) + int_const = op; + + else if (GET_CODE (op) == PLUS + && base_reg_operand (XEXP (op, 0), Pmode) + && CONST_INT_P (XEXP (op, 1))) + int_const = XEXP (op, 1); + + else + return 0; + + /* Power8 currently will only do the fusion if the top 11 bits of the addis + value are all 1's or 0's. */ + value = INTVAL (int_const); + if ((value & (HOST_WIDE_INT)0xffff) != 0) + return 0; + + if ((value & (HOST_WIDE_INT)0xffff0000) == 0) + return 0; + + return (IN_RANGE (value >> 16, -32, 31)); +}) + +;; Match the second insn (lbz, lhz, lwz, ld) in fusing the combination of addis +;; and loads to GPR registers on power8. +(define_predicate "fusion_gpr_mem_load" + (match_code "mem") +{ + rtx addr; + + if (!MEM_P (op)) + return 0; + + switch (mode) + { + case QImode: + case HImode: + case SImode: + break; + + case DImode: + if (!TARGET_POWERPC64) + return 0; + break; + + default: + return 0; + } + + addr = XEXP (op, 0); + if (GET_CODE (addr) == PLUS) + { + rtx base = XEXP (addr, 0); + rtx offset = XEXP (addr, 1); + + return (base_reg_operand (base, GET_MODE (base)) + && satisfies_constraint_I (offset)); + } + + else if (GET_CODE (addr) == LO_SUM) + { + rtx base = XEXP (addr, 0); + rtx offset = XEXP (addr, 1); + + if (!base_reg_operand (base, GET_MODE (base))) + return 0; + + else if (TARGET_XCOFF || (TARGET_ELF && TARGET_POWERPC64)) + return small_toc_ref (offset, GET_MODE (offset)); + + else if (TARGET_ELF && !TARGET_POWERPC64) + return CONSTANT_P (offset); + } + + return 0; +}) |