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author | segher <segher@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-05-23 16:45:11 +0000 |
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committer | segher <segher@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-05-23 16:45:11 +0000 |
commit | 74d4257877f75f4628f2a97fcfc3e239e6cc9be8 (patch) | |
tree | 1d9879d9a796dd6a703aef72869a9072d53c1e66 /gcc/config/rs6000/power5.md | |
parent | 7f15413b4d7f06fb190be78f05f975262440befb (diff) | |
download | gcc-74d4257877f75f4628f2a97fcfc3e239e6cc9be8.tar.gz |
rs6000: Make all logical instructions one type
They are currently just "integer", but the dot version is fast_compare.
This makes them all "logical".
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210872 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/power5.md')
-rw-r--r-- | gcc/config/rs6000/power5.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/rs6000/power5.md b/gcc/config/rs6000/power5.md index 5df009e4520..198db827f8c 100644 --- a/gcc/config/rs6000/power5.md +++ b/gcc/config/rs6000/power5.md @@ -167,7 +167,7 @@ ; Integer latency is 2 cycles (define_insn_reservation "power5-integer" 2 (and (ior (eq_attr "type" "integer,trap,cntlz,exts,isel,popcnt") - (and (eq_attr "type" "add,shift") + (and (eq_attr "type" "add,logical,shift") (eq_attr "dot" "no")) (and (eq_attr "type" "insert") (eq_attr "size" "64"))) @@ -203,8 +203,8 @@ "du1_power5+du2_power5,iu1_power5,nothing,iu2_power5") (define_insn_reservation "power5-cmp" 3 - (and (ior (eq_attr "type" "cmp,fast_compare") - (and (eq_attr "type" "add") + (and (ior (eq_attr "type" "cmp") + (and (eq_attr "type" "add,logical") (eq_attr "dot" "yes"))) (eq_attr "cpu" "power5")) "iq_power5") |