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| author | dje <dje@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-07-07 14:30:14 +0000 |
|---|---|---|
| committer | dje <dje@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-07-07 14:30:14 +0000 |
| commit | dda067b9b5ccf4b56314d719820288e9789e3885 (patch) | |
| tree | 955cd40d8715a07dc2818bb9bbd6b997d6646a4f /gcc/config/rs6000/power5.md | |
| parent | aceb72d385a46da9c11219b802b83fb374f61bce (diff) | |
| download | gcc-dda067b9b5ccf4b56314d719820288e9789e3885.tar.gz | |
* config/rs6000/rs6000.md (UNSPEC_SYNC, UNSPEC_SYNC_OP,
UNSPEC_SYNC_SWAP, UNSPEC_LWSYNC, UNSPEC_ISYNC): Delete.
(UNSPECV_LL, UNSPECV_SC, UNSPECV_ATOMIC, UNSPECV_SYNC,
UNSPECV_SYNC_OP, UNSPECV_CMPXCHG, UNSPECV_LWSYNC, UNSPECV_ISYNC): New.
(define_attr "type"): Add isync, sync, load_l, store_c.
* config/rs6000/sync.md (memory_barrier): Change to define_expand.
Create scratch volatile MEM.
(sync_internal): New. POWER mnemonic is dcs, not ics. Attribute
sync.
(load_locked_<mode>): New.
(store_conditional_<mode>): New.
(sync_compare_and_swap<mode>): Replace with splitter.
(sync_lock_test_and_set<mode>): Replace with splitter.
(sync_<fetchop><mode>): Change to unspec_volatile UNSPECV_SYNC_OP
and UNSPECV_ISYNC.
(isync): Change to unspec_volatile UNSPECV_ISYNC. POWER mnemonic
is ics. Attribute isync.
(lwsync): Change to unspec_volatile UNSPECV_LWSYNC. Attribute
lwsync.
* config/rs6000/rs6000.c (rs6000_emit_sync): Use UNSPEC_VOLATILE
and UNSPECV_SYNC_OP.
(emit_unlikely_jump): New.
(emit_load_locked): New.
(emit_store_conditional): New.
(rs6000_split_compare_and_swap): New.
(rs6000_split_lock_test_and_set): New.
(is_dispatch_slot_restricted): Return 4 for TYPE_LOAD_L,
TYPE_STORE_C, TYPE_ISYNC, TYPE_SYNC.
* config/rs6000/rs6000-protos.h (rs6000_split_compare_and_swap,
rs6000_split_lock_test_and_set): Declare.
* config/rs6000/{40x.md,440.md,603.md,6xx.md,7450.md,7xx.md,8540.md,
mpc.md,power4.md,power5.md,rios1.md,rios2.md,rs64.md): Add load_l,
store_c, isync, sync.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@101712 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/rs6000/power5.md')
| -rw-r--r-- | gcc/config/rs6000/power5.md | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/gcc/config/rs6000/power5.md b/gcc/config/rs6000/power5.md index 0dc1fdc4c02..ce6892605d1 100644 --- a/gcc/config/rs6000/power5.md +++ b/gcc/config/rs6000/power5.md @@ -135,6 +135,12 @@ (eq_attr "cpu" "power5")) "du1_power5+du2_power5,lsu1_power5+iu2_power5,fpu1_power5") +(define_insn_reservation "power5-llsc" 11 + (and (eq_attr "type" "load_l,store_c,sync") + (eq_attr "cpu" "power5")) + "du1_power5+du2_power5+du3_power5+du4_power5,\ + lsu1_power5") + ; Integer latency is 2 cycles (define_insn_reservation "power5-integer" 2 @@ -307,3 +313,9 @@ |(du3_power5,fpu2_power5*35)\ |(du4_power5,fpu2_power5*35)") +(define_insn_reservation "power5-isync" 2 + (and (eq_attr "type" "isync") + (eq_attr "cpu" "power5")) + "du1_power5+du2_power5+du3_power5+du4_power5,\ + lsu1_power5") + |