diff options
| author | Segher Boessenkool <segher@kernel.crashing.org> | 2014-05-08 00:00:58 +0200 |
|---|---|---|
| committer | Segher Boessenkool <segher@gcc.gnu.org> | 2014-05-08 00:00:58 +0200 |
| commit | d839f53b7dfd86250420bce15382c98cbd43b4ec (patch) | |
| tree | cd8a170e4a1bf065792be21e8461f7608f25a897 /gcc/config/rs6000/dfp.md | |
| parent | d3b4df0b173c3ad5f1e8f5d9f6a5df3518322129 (diff) | |
| download | gcc-d839f53b7dfd86250420bce15382c98cbd43b4ec.tar.gz | |
rs6000: New attributes for load/store: "sign_extend", "update" and "indexed"
The new attributes replace the instruction types *_ext*, *_u, *_ux.
This simplifies all code that does not care about the addressing modes,
putting the burden on the code that does care (mostly the scheduling
descriptions for certain CPUs).
It fixes a few minor bugs in the process.
The "update" and "indexed" attributes are automatic for any insn that
has a MEM as operand 0 or 1. Other insns have to set it manually, if
they do not like the default (which is "no"). Insns that are type
load/store/fpload/fpstore but have fewer than two operands need to set
it too, or the compiler will crash. There are very few of those.
This tries not to change semantics anywhere; in particular, the string
and multiple instructions set both "update" and "indexed" (although
they are neither).
From-SVN: r210190
Diffstat (limited to 'gcc/config/rs6000/dfp.md')
| -rw-r--r-- | gcc/config/rs6000/dfp.md | 18 |
1 files changed, 2 insertions, 16 deletions
diff --git a/gcc/config/rs6000/dfp.md b/gcc/config/rs6000/dfp.md index 40e27e77d23..63ae541225e 100644 --- a/gcc/config/rs6000/dfp.md +++ b/gcc/config/rs6000/dfp.md @@ -37,14 +37,7 @@ || gpc_reg_operand (operands[1], SDmode)) && TARGET_HARD_FLOAT && TARGET_FPRS" "stfd%U0%X0 %1,%0" - [(set (attr "type") - (if_then_else - (match_test "update_indexed_address_mem (operands[0], VOIDmode)") - (const_string "fpstore_ux") - (if_then_else - (match_test "update_address_mem (operands[0], VOIDmode)") - (const_string "fpstore_u") - (const_string "fpstore")))) + [(set_attr "type" "fpstore") (set_attr "length" "4")]) (define_insn "movsd_load" @@ -55,14 +48,7 @@ || gpc_reg_operand (operands[1], DDmode)) && TARGET_HARD_FLOAT && TARGET_FPRS" "lfd%U1%X1 %0,%1" - [(set (attr "type") - (if_then_else - (match_test "update_indexed_address_mem (operands[1], VOIDmode)") - (const_string "fpload_ux") - (if_then_else - (match_test "update_address_mem (operands[1], VOIDmode)") - (const_string "fpload_u") - (const_string "fpload")))) + [(set_attr "type" "fpload") (set_attr "length" "4")]) ;; Hardware support for decimal floating point operations. |