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| author | David Edelsohn <edelsohn@gnu.org> | 2005-07-07 14:30:14 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2005-07-07 10:30:14 -0400 |
| commit | b52110d478b71ec2e1f099b3c1b539228a9bdaea (patch) | |
| tree | 955cd40d8715a07dc2818bb9bbd6b997d6646a4f /gcc/config/rs6000/40x.md | |
| parent | 456f9beaadde15da4885551550399b8acc870e54 (diff) | |
| download | gcc-b52110d478b71ec2e1f099b3c1b539228a9bdaea.tar.gz | |
rs6000.md (UNSPEC_SYNC, [...]): Delete.
* config/rs6000/rs6000.md (UNSPEC_SYNC, UNSPEC_SYNC_OP,
UNSPEC_SYNC_SWAP, UNSPEC_LWSYNC, UNSPEC_ISYNC): Delete.
(UNSPECV_LL, UNSPECV_SC, UNSPECV_ATOMIC, UNSPECV_SYNC,
UNSPECV_SYNC_OP, UNSPECV_CMPXCHG, UNSPECV_LWSYNC, UNSPECV_ISYNC): New.
(define_attr "type"): Add isync, sync, load_l, store_c.
* config/rs6000/sync.md (memory_barrier): Change to define_expand.
Create scratch volatile MEM.
(sync_internal): New. POWER mnemonic is dcs, not ics. Attribute
sync.
(load_locked_<mode>): New.
(store_conditional_<mode>): New.
(sync_compare_and_swap<mode>): Replace with splitter.
(sync_lock_test_and_set<mode>): Replace with splitter.
(sync_<fetchop><mode>): Change to unspec_volatile UNSPECV_SYNC_OP
and UNSPECV_ISYNC.
(isync): Change to unspec_volatile UNSPECV_ISYNC. POWER mnemonic
is ics. Attribute isync.
(lwsync): Change to unspec_volatile UNSPECV_LWSYNC. Attribute
lwsync.
* config/rs6000/rs6000.c (rs6000_emit_sync): Use UNSPEC_VOLATILE
and UNSPECV_SYNC_OP.
(emit_unlikely_jump): New.
(emit_load_locked): New.
(emit_store_conditional): New.
(rs6000_split_compare_and_swap): New.
(rs6000_split_lock_test_and_set): New.
(is_dispatch_slot_restricted): Return 4 for TYPE_LOAD_L,
TYPE_STORE_C, TYPE_ISYNC, TYPE_SYNC.
* config/rs6000/rs6000-protos.h (rs6000_split_compare_and_swap,
rs6000_split_lock_test_and_set): Declare.
* config/rs6000/{40x.md,440.md,603.md,6xx.md,7450.md,7xx.md,8540.md,
mpc.md,power4.md,power5.md,rios1.md,rios2.md,rs64.md): Add load_l,
store_c, isync, sync.
From-SVN: r101712
Diffstat (limited to 'gcc/config/rs6000/40x.md')
| -rw-r--r-- | gcc/config/rs6000/40x.md | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/gcc/config/rs6000/40x.md b/gcc/config/rs6000/40x.md index 9167cb5c3ec..c1fdce0fc25 100644 --- a/gcc/config/rs6000/40x.md +++ b/gcc/config/rs6000/40x.md @@ -27,7 +27,8 @@ ;; In-order execution ;; Max issue two insns/cycle (includes one branch) (define_insn_reservation "ppc403-load" 2 - (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u") + (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\ + load_l,store_c,sync") (eq_attr "cpu" "ppc403,ppc405")) "iu_40x") @@ -102,7 +103,7 @@ "iu_40x") (define_insn_reservation "ppc403-jmpreg" 1 - (and (eq_attr "type" "jmpreg,branch") + (and (eq_attr "type" "jmpreg,branch,isync") (eq_attr "cpu" "ppc403,ppc405")) "bpu_40x") @@ -112,6 +113,7 @@ "bpu_40x") (define_insn_reservation "ppc405-float" 11 - (and (eq_attr "type" "fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,fpcompare,fp,dmul,sdiv,ddiv") + (and (eq_attr "type" "fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,\ + fpcompare,fp,dmul,sdiv,ddiv") (eq_attr "cpu" "ppc405")) "fpu_405*10") |