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| author | danglin <danglin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2006-12-08 23:41:03 +0000 |
|---|---|---|
| committer | danglin <danglin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2006-12-08 23:41:03 +0000 |
| commit | b26090ec82310d54b2c318bcc6b4a8e15062588c (patch) | |
| tree | e34ec595bc4581bc54b0a45a2b16af45aa907c13 /gcc/config/pa | |
| parent | 9afd7ce43f4025a38c190d49e03815b610ec11af (diff) | |
| download | gcc-b26090ec82310d54b2c318bcc6b4a8e15062588c.tar.gz | |
PR target/30039
* pa.md (high:DI and lo_sum:DI): Handle 64-bit CONST_INTs in 32-bit
patterns. Correct length of high:DI instruction sequence.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@119669 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa')
| -rw-r--r-- | gcc/config/pa/pa.md | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index ada336823df..3b5a5fc28f0 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -4427,6 +4427,7 @@ switch (GET_CODE (op1)) { case CONST_INT: +#if HOST_BITS_PER_WIDE_INT <= 32 operands[0] = operand_subword (op0, 1, 0, DImode); output_asm_insn (\"ldil L'%1,%0\", operands); @@ -4435,6 +4436,15 @@ output_asm_insn (\"ldi -1,%0\", operands); else output_asm_insn (\"ldi 0,%0\", operands); +#else + operands[0] = operand_subword (op0, 1, 0, DImode); + operands[1] = GEN_INT (INTVAL (op1) & 0xffffffff); + output_asm_insn (\"ldil L'%1,%0\", operands); + + operands[0] = operand_subword (op0, 0, 0, DImode); + operands[1] = GEN_INT (INTVAL (op1) >> 32); + output_asm_insn (singlemove_string (operands), operands); +#endif break; case CONST_DOUBLE: @@ -4453,7 +4463,7 @@ return \"\"; }" [(set_attr "type" "move") - (set_attr "length" "8")]) + (set_attr "length" "12")]) (define_insn "" [(set (match_operand:DI 0 "move_dest_operand" @@ -4613,6 +4623,9 @@ handle it correctly. */ if (GET_CODE (operands[2]) == CONST_DOUBLE) operands[2] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + else if (HOST_BITS_PER_WIDE_INT > 32 + && GET_CODE (operands[2]) == CONST_INT) + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffffffff); if (which_alternative == 1) output_asm_insn (\"copy %1,%0\", operands); return \"ldo R'%G2(%R1),%R0\"; |