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authorlaw <law@138bc75d-0d04-0410-961f-82ee72b054a4>2015-05-21 12:44:35 +0000
committerlaw <law@138bc75d-0d04-0410-961f-82ee72b054a4>2015-05-21 12:44:35 +0000
commitedb1ad782e5bc4c6cb74a9cea22ada88f491f435 (patch)
tree33e14240d1aea93da7c0d3d7c5748f572def94a0 /gcc/config/pa
parentdedba4287181f141e309d808ab52f0074928122f (diff)
downloadgcc-edb1ad782e5bc4c6cb74a9cea22ada88f491f435.tar.gz
2015-05-20 Jeff Law <law@redhat.com>
* config/pa/pa.c (pa_print_operand): New 'o' output modifier. (pa_mem_shadd_constant_p): Renamed from pa_shadd_constant_p. (pa_shadd_constant_p): Allow constants for shadd insns rather than valid scaling constants for memory addresses. * config/pa/pa-protos.h (pa_mem_shadd_constant_p): Add prototype. * config/pa/predicates.md (mem_shadd_operand): New predicate. * config/pa/pa.md (shift-add insns using MULT): Use mem_shadd_operand. (shift-add insns using ASHIFT): New patterns. * gcc.target/hppa/hppa.exp: New target test driver. * gcc.target/hppa/shadd-1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@223480 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa')
-rw-r--r--gcc/config/pa/pa-protos.h1
-rw-r--r--gcc/config/pa/pa.c18
-rw-r--r--gcc/config/pa/pa.md24
-rw-r--r--gcc/config/pa/predicates.md4
4 files changed, 44 insertions, 3 deletions
diff --git a/gcc/config/pa/pa-protos.h b/gcc/config/pa/pa-protos.h
index 4a44dab6710..58cc463b7c4 100644
--- a/gcc/config/pa/pa-protos.h
+++ b/gcc/config/pa/pa-protos.h
@@ -85,6 +85,7 @@ extern int pa_and_mask_p (unsigned HOST_WIDE_INT);
extern int pa_cint_ok_for_move (HOST_WIDE_INT);
extern int pa_ior_mask_p (unsigned HOST_WIDE_INT);
extern int pa_ldil_cint_p (HOST_WIDE_INT);
+extern int pa_mem_shadd_constant_p (int);
extern int pa_shadd_constant_p (int);
extern int pa_zdepi_cint_p (unsigned HOST_WIDE_INT);
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index cfdafa69c27..f99cf335f49 100644
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -5242,6 +5242,11 @@ pa_print_operand (FILE *file, rtx x, int code)
gcc_assert (GET_CODE (x) == CONST_INT);
fprintf (file, HOST_WIDE_INT_PRINT_DEC, 32 - (INTVAL (x) & 31));
return;
+ case 'o':
+ gcc_assert (GET_CODE (x) == CONST_INT
+ && (INTVAL (x) == 1 || INTVAL (x) == 2 || INTVAL (x) == 3));
+ fprintf (file, "%d", INTVAL (x));
+ return;
case 'O':
gcc_assert (GET_CODE (x) == CONST_INT && exact_log2 (INTVAL (x)) >= 0);
fprintf (file, "%d", exact_log2 (INTVAL (x)));
@@ -8729,11 +8734,22 @@ pa_fmpysuboperands (rtx *operands)
}
/* Return 1 if the given constant is 2, 4, or 8. These are the valid
+ constants for a MULT embedded inside a memory address. */
+int
+pa_mem_shadd_constant_p (int val)
+{
+ if (val == 2 || val == 4 || val == 8)
+ return 1;
+ else
+ return 0;
+}
+
+/* Return 1 if the given constant is 1, 2, or 3. These are the valid
constants for shadd instructions. */
int
pa_shadd_constant_p (int val)
{
- if (val == 2 || val == 4 || val == 8)
+ if (val == 1 || val == 2 || val == 3)
return 1;
else
return 0;
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index cc077a419e5..73c8f6bce13 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -6337,7 +6337,7 @@
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(plus:SI (mult:SI (match_operand:SI 2 "register_operand" "r")
- (match_operand:SI 3 "shadd_operand" ""))
+ (match_operand:SI 3 "mem_shadd_operand" ""))
(match_operand:SI 1 "register_operand" "r")))]
""
"{sh%O3addl %2,%1,%0|shladd,l %2,%O3,%1,%0} "
@@ -6347,13 +6347,33 @@
(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
(plus:DI (mult:DI (match_operand:DI 2 "register_operand" "r")
- (match_operand:DI 3 "shadd_operand" ""))
+ (match_operand:DI 3 "mem_shadd_operand" ""))
(match_operand:DI 1 "register_operand" "r")))]
"TARGET_64BIT"
"shladd,l %2,%O3,%1,%0"
[(set_attr "type" "binary")
(set_attr "length" "4")])
+(define_insn ""
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (plus:SI (ashift:SI (match_operand:SI 2 "register_operand" "r")
+ (match_operand:SI 3 "shadd_operand" ""))
+ (match_operand:SI 1 "register_operand" "r")))]
+ ""
+ "{sh%o3addl %2,%1,%0|shladd,l %2,%o3,%1,%0} "
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
+(define_insn ""
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (plus:DI (ashift:DI (match_operand:DI 2 "register_operand" "r")
+ (match_operand:DI 3 "shadd_operand" ""))
+ (match_operand:DI 1 "register_operand" "r")))]
+ "TARGET_64BIT"
+ "shladd,l %2,%o3,%1,%0"
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
(define_expand "ashlsi3"
[(set (match_operand:SI 0 "register_operand" "")
(ashift:SI (match_operand:SI 1 "lhs_lshift_operand" "")
diff --git a/gcc/config/pa/predicates.md b/gcc/config/pa/predicates.md
index fcf68462d4c..bbbaa852b25 100644
--- a/gcc/config/pa/predicates.md
+++ b/gcc/config/pa/predicates.md
@@ -581,6 +581,10 @@
;; Return 1 if OP is a CONST_INT with the value 2, 4, or 8. These are
;; the valid constants for shadd instructions.
+(define_predicate "mem_shadd_operand"
+ (and (match_code "const_int")
+ (match_test "pa_mem_shadd_constant_p (INTVAL (op))")))
+
(define_predicate "shadd_operand"
(and (match_code "const_int")
(match_test "pa_shadd_constant_p (INTVAL (op))")))