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authorJohn David Anglin <danglin@gcc.gnu.org>2016-11-01 18:15:57 +0000
committerJohn David Anglin <danglin@gcc.gnu.org>2016-11-01 18:15:57 +0000
commite592dd625d5ad569561b081a01ff4a6be24693e0 (patch)
treebd25d482c6bafaa0d3949b069031c89ebb996946 /gcc/config/pa/pa.md
parentad89d820bf04a06b636fe7ecd37e4e6e4a1942d5 (diff)
downloadgcc-e592dd625d5ad569561b081a01ff4a6be24693e0.tar.gz
re PR target/78166 (hash.c:1887:1: error: unrecognizable insn)
PR target/78166 * config/pa/pa.md: Add new shift/add patterns to handle (plus (mult (reg) (mem_shadd_operand)) (reg)) source operand. From-SVN: r241749
Diffstat (limited to 'gcc/config/pa/pa.md')
-rw-r--r--gcc/config/pa/pa.md30
1 files changed, 30 insertions, 0 deletions
diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index e4c806f84a8..6725504fce9 100644
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -6249,6 +6249,21 @@
(set_attr "length" "4")])
(define_insn ""
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (plus:SI (mult:SI (match_operand:SI 2 "register_operand" "r")
+ (match_operand:SI 3 "mem_shadd_operand" ""))
+ (match_operand:SI 1 "register_operand" "r")))]
+ ""
+ "*
+{
+ int shift_val = exact_log2 (INTVAL (operands[3]));
+ operands[3] = GEN_INT (shift_val);
+ return \"{sh%o3addl %2,%1,%0|shladd,l %2,%o3,%1,%0}\";
+}"
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
+(define_insn ""
[(set (match_operand:DI 0 "register_operand" "=r")
(plus:DI (ashift:DI (match_operand:DI 2 "register_operand" "r")
(match_operand:DI 3 "shadd_operand" ""))
@@ -6258,6 +6273,21 @@
[(set_attr "type" "binary")
(set_attr "length" "4")])
+(define_insn ""
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (plus:DI (mult:DI (match_operand:DI 2 "register_operand" "r")
+ (match_operand:DI 3 "mem_shadd_operand" ""))
+ (match_operand:DI 1 "register_operand" "r")))]
+ "TARGET_64BIT"
+ "*
+{
+ int shift_val = exact_log2 (INTVAL (operands[3]));
+ operands[3] = GEN_INT (shift_val);
+ return \"shladd,l %2,%o3,%1,%0\";
+}"
+ [(set_attr "type" "binary")
+ (set_attr "length" "4")])
+
(define_expand "ashlsi3"
[(set (match_operand:SI 0 "register_operand" "")
(ashift:SI (match_operand:SI 1 "lhs_lshift_operand" "")