diff options
| author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-11-11 17:45:02 +0000 |
|---|---|---|
| committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-11-11 17:45:02 +0000 |
| commit | 6dc3b0d9e987dfcf459e52cedb17e14722844f2c (patch) | |
| tree | fb02cb5536197f3e86e30e92dd6cba7770735eb4 /gcc/config/pa/milli64.S | |
| parent | 38d07189cc68f42f8eb2d9d2fbd982a67cae19b3 (diff) | |
| download | gcc-6dc3b0d9e987dfcf459e52cedb17e14722844f2c.tar.gz | |
* config/pa/milli64.S: Fix comment formatting.
* config/pa/pa-64.h: Likewise.
* config/pa/pa-linux.h: Likewise.
* config/pa/pa-protos.h: Likewise.
* config/pa/pa.c: Likewise.
* config/pa/pa.h: Likewise.
* config/pa/pa32-linux.h: Likewise.
* config/pa/pa32-regs.h: Likewise.
* config/pa/pa64-hpux.h: Likewise.
* config/pa/pa64-regs.h: Likewise.
* config/pa/som.h: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@46930 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/pa/milli64.S')
| -rw-r--r-- | gcc/config/pa/milli64.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/pa/milli64.S b/gcc/config/pa/milli64.S index b7704d43149..e456d875110 100644 --- a/gcc/config/pa/milli64.S +++ b/gcc/config/pa/milli64.S @@ -388,7 +388,7 @@ LSYM(small_divisor) #if defined(pa64) /* Clear the upper 32 bits of the arg1 register. We are working with */ /* small divisors (and 32 bit integers) We must not be mislead */ -/* by "1" bits left in the upper 32 bits. */ +/* by "1" bits left in the upper 32 bits. */ depd %r0,31,32,%r25 #endif blr,n arg1,r0 @@ -1765,7 +1765,7 @@ LSYM(l4) sub,> 0,a1,t0 /* otherwise negate both and */ combt,<=,n a0,t0,LREF(l2) /* swap back if |a0|<|a1| */ sub 0,a0,a1 - movb,tr,n t0,a0,LREF(l2) /* 10th inst. */ + movb,tr,n t0,a0,LREF(l2) /* 10th inst. */ LSYM(l0) r__r_t0 /* add in this partial product */ LSYM(l1) a0__256a0 /* a0 <<= 8 ****************** */ @@ -1773,7 +1773,7 @@ LSYM(l2) zdep a1,30,8,t0 /* t0 = (a1&0xff)<<1 ********* */ LSYM(l3) blr t0,0 /* case on these 8 bits ****** */ extru a1,23,24,a1 /* a1 >>= 8 ****************** */ -/*16 insts before this. */ +/*16 insts before this. */ /* a0 <<= 8 ************************** */ LSYM(x0) a1_ne_0_b_l2 ! a0__256a0 ! MILLIRETN ! nop LSYM(x1) a1_ne_0_b_l1 ! r__r_a0 ! MILLIRETN ! nop @@ -2031,7 +2031,7 @@ LSYM(x252) t0__64a0 ! t0__t0ma0 ! b_e_shift ! r__r_4t0 LSYM(x253) t0__64a0 ! t0__t0ma0 ! b_e_t0 ! t0__4t0_a0 LSYM(x254) t0__128a0 ! t0__t0ma0 ! b_e_shift ! r__r_2t0 LSYM(x255) t0__256a0 ! a1_ne_0_b_l0 ! t0__t0ma0 ! b_n_ret_t0 -/*1040 insts before this. */ +/*1040 insts before this. */ LSYM(ret_t0) MILLIRET LSYM(e_t0) r__r_t0 LSYM(e_shift) a1_ne_0_b_l2 |