diff options
author | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-08-14 19:00:56 +0000 |
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committer | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-08-14 19:00:56 +0000 |
commit | ddda25955ee583217ccbd7ad5c33c6bb9f304649 (patch) | |
tree | ed58c0f92eec5cacc819d56d29106d38a318e9ac /gcc/config/mn10300 | |
parent | 04fa393515487bde6dc2a0bc318398d983825365 (diff) | |
download | gcc-ddda25955ee583217ccbd7ad5c33c6bb9f304649.tar.gz |
2008-08-14 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk r139100
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@139113 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mn10300')
-rw-r--r-- | gcc/config/mn10300/mn10300.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index ea7392bb0f9..6f172fc0b26 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -1319,11 +1319,11 @@ store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) } /* What (if any) secondary registers are needed to move IN with mode - MODE into a register in register class CLASS. + MODE into a register in register class RCLASS. We might be able to simplify this. */ enum reg_class -mn10300_secondary_reload_class (enum reg_class class, enum machine_mode mode, +mn10300_secondary_reload_class (enum reg_class rclass, enum machine_mode mode, rtx in) { /* Memory loads less than a full word wide can't have an @@ -1336,8 +1336,8 @@ mn10300_secondary_reload_class (enum reg_class class, enum machine_mode mode, && GET_CODE (SUBREG_REG (in)) == REG && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)) && (mode == QImode || mode == HImode) - && (class == ADDRESS_REGS || class == SP_REGS - || class == SP_OR_ADDRESS_REGS)) + && (rclass == ADDRESS_REGS || rclass == SP_REGS + || rclass == SP_OR_ADDRESS_REGS)) { if (TARGET_AM33) return DATA_OR_EXTENDED_REGS; @@ -1346,12 +1346,12 @@ mn10300_secondary_reload_class (enum reg_class class, enum machine_mode mode, /* We can't directly load sp + const_int into a data register; we must use an address register as an intermediate. */ - if (class != SP_REGS - && class != ADDRESS_REGS - && class != SP_OR_ADDRESS_REGS - && class != SP_OR_EXTENDED_REGS - && class != ADDRESS_OR_EXTENDED_REGS - && class != SP_OR_ADDRESS_OR_EXTENDED_REGS + if (rclass != SP_REGS + && rclass != ADDRESS_REGS + && rclass != SP_OR_ADDRESS_REGS + && rclass != SP_OR_EXTENDED_REGS + && rclass != ADDRESS_OR_EXTENDED_REGS + && rclass != SP_OR_ADDRESS_OR_EXTENDED_REGS && (in == stack_pointer_rtx || (GET_CODE (in) == PLUS && (XEXP (in, 0) == stack_pointer_rtx @@ -1363,7 +1363,7 @@ mn10300_secondary_reload_class (enum reg_class class, enum machine_mode mode, || XEXP (in, 1) == stack_pointer_rtx)) return GENERAL_REGS; - if (TARGET_AM33_2 && class == FP_REGS + if (TARGET_AM33_2 && rclass == FP_REGS && GET_CODE (in) == MEM && ! (GET_CODE (in) == MEM && !CONSTANT_ADDRESS_P (XEXP (in, 0)))) { |