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| author | nickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-04-07 14:02:37 +0000 |
|---|---|---|
| committer | nickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-04-07 14:02:37 +0000 |
| commit | 23add660091ec21abe9e2845a4366a3e3ceedf2c (patch) | |
| tree | 7a59917fe5037aea60cc9ac116105d7513978fa8 /gcc/config/mn10300 | |
| parent | 1994bf18b90ba2e1a883c62190197389f428f6b6 (diff) | |
| download | gcc-23add660091ec21abe9e2845a4366a3e3ceedf2c.tar.gz | |
* config/mn10300/mn10300.md (movqi_internal): Add alternatives
to handle MDR <-> data register transfers.
(movhi_internal): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@172099 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mn10300')
| -rw-r--r-- | gcc/config/mn10300/mn10300.md | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md index 3d8e9147052..f3f23e7fa37 100644 --- a/gcc/config/mn10300/mn10300.md +++ b/gcc/config/mn10300/mn10300.md @@ -239,8 +239,8 @@ }) (define_insn "*movqi_internal" - [(set (match_operand:QI 0 "nonimmediate_operand" "=*r,D*r,D*r,D,m") - (match_operand:QI 1 "general_operand" " 0,D*r, i,m,D"))] + [(set (match_operand:QI 0 "nonimmediate_operand" "=*r,D*r,D*r,D,m,*z,d") + (match_operand:QI 1 "general_operand" " 0,D*r, i,m,D,d,*z"))] "(register_operand (operands[0], QImode) || register_operand (operands[1], QImode))" { @@ -250,6 +250,8 @@ return ""; case 1: case 2: + case 5: + case 6: return "mov %1,%0"; case 3: case 4: @@ -266,6 +268,8 @@ (const_int 13) (const_int 24)) (if_then_else (eq_attr "cpu" "am34") (const_int 11) (const_int 22)) + (const_int 11) + (const_int 11) ])] ) @@ -283,8 +287,8 @@ }) (define_insn "*movhi_internal" - [(set (match_operand:HI 0 "nonimmediate_operand" "=*r,D*r,D*r,D,m") - (match_operand:HI 1 "general_operand" " 0, i,D*r,m,D"))] + [(set (match_operand:HI 0 "nonimmediate_operand" "=*r,D*r,D*r,D,m,*z,d") + (match_operand:HI 1 "general_operand" " 0, i,D*r,m,D,d,*z"))] "(register_operand (operands[0], HImode) || register_operand (operands[1], HImode))" { @@ -302,6 +306,8 @@ && REGNO_EXTENDED_P (REGNO (operands[0]), 1)) return "movu %1,%0"; /* FALLTHRU */ + case 5: + case 6: case 2: return "mov %1,%0"; case 3: @@ -320,6 +326,10 @@ (const_int 13) (const_int 24)) (if_then_else (eq_attr "cpu" "am34") (const_int 11) (const_int 22)) + (if_then_else (eq_attr "cpu" "am34") + (const_int 11) (const_int 22)) + (if_then_else (eq_attr "cpu" "am34") + (const_int 11) (const_int 22)) ])] ) |