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authorjsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>2007-07-04 16:50:38 +0000
committerjsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>2007-07-04 16:50:38 +0000
commite91288e0c4a8b50075ad8fa5daa6c4db8b453d5f (patch)
treec160ca119e481152ec935d2a712c621bc591611d /gcc/config/mips/sb1.md
parentf757850a1d54af91a5114d1616991cde2b833d05 (diff)
downloadgcc-e91288e0c4a8b50075ad8fa5daa6c4db8b453d5f.tar.gz
2007-07-04 David Ung <davidu@mips.com>
Joseph Myers <joseph@codesourcery.com> * config/mips/mips.md (type): Add logical, signext and move. (one_cmpl<mode>2, *and<mode>3, *and<mode>3_mips16, *ior<mode>3, *ior<mode>3_mips16, two unnamed insns after *ior<mode>3_mips16, *nor<mode>3, "Combiner patterns to optimize truncate/zero_extend combinations", *zero_extend<SHORT:mode><GPR:mode>2, *zero_extendqihi2, *extend<SHORT:mode><GPR:mode>2_mips16e, *extend<SHORT:mode><GPR:mode>2_se<SHORT:size>, *movdi_64bit, *movdi_64bit_mips16, *movsi_internal, *movsi_mips16, movcc, *movhi_internal, *movhi_mips16, *movqi_internal, *movqi_mips16, *movsf_hardfloat, *movsf_softfloat, *movsf_mips16, *movdf_hardfloat_64bit, *movdf_hardfloat_32bit, movv2sf_hardfloat_64bit): Use the new types. (*movdi_32bit, *movdi_gp32_fp64, *movdi_32bit_mips16, *movdf_softfloat, *movdf_mips16): Use "multi". (extendqihi2): Replace with a define_expand. (*extendqihi2_mips16e, *extendqihi2, *extendqihi2_seb): New. Based on extend<SHORT:mode><GPR:mode>2 patterns. * config/mips/74k.md (r74k_int_logical): New reservation and bypasses. (r74k_int_arith): Remove "slt". * config/mips/24k.md, config/mips/4130.md, config/mips/4k.md, config/mips/5400.md, config/mips/5500.md, config/mips/5k.md, config/mips/7000.md, config/mips/9000.md, config/mips/generic.md, config/mips/sb1.md, config/mips/sr71k.md: Add new types to reservations for "arith". git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@126327 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips/sb1.md')
-rw-r--r--gcc/config/mips/sb1.md4
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/mips/sb1.md b/gcc/config/mips/sb1.md
index 5d06a86456a..2d8e2fe3bf7 100644
--- a/gcc/config/mips/sb1.md
+++ b/gcc/config/mips/sb1.md
@@ -236,7 +236,7 @@
(define_insn_reservation "ir_sb1_simple_alu" 2
(and (eq_attr "cpu" "sb1")
- (eq_attr "type" "const,arith"))
+ (eq_attr "type" "const,arith,logical,move,signext"))
"sb1_ls1 | sb1_ex1 | sb1_ex0")
;; On SB-1A, simple alu instructions can not execute on the LS1 unit, and we
@@ -244,7 +244,7 @@
(define_insn_reservation "ir_sb1a_simple_alu" 1
(and (eq_attr "cpu" "sb1a")
- (eq_attr "type" "const,arith"))
+ (eq_attr "type" "const,arith,logical,move,signext"))
"sb1_ex1 | sb1_ex0")
;; ??? condmove also includes some FP instructions that execute on the FP