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| author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-08-24 20:24:00 +0000 |
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| committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-08-24 20:24:00 +0000 |
| commit | f61e00701e8601b1448fb7bd69820fcf7a5ec32e (patch) | |
| tree | 053c41789771654d6da9f5340f3288259603d42a /gcc/config/mips/mips.md | |
| parent | 9c9db02569e45024ab2ceb8a08fb2fd288731c99 (diff) | |
| download | gcc-f61e00701e8601b1448fb7bd69820fcf7a5ec32e.tar.gz | |
* gcc.c-torture/compile/20040824-1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@86513 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips/mips.md')
| -rw-r--r-- | gcc/config/mips/mips.md | 79 |
1 files changed, 17 insertions, 62 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 46ec8cf1be1..b0179d97022 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -5975,73 +5975,28 @@ beq\t%2,%.,1b\;\ ;; -(define_expand "prefetch" - [(prefetch (match_operand 0 "address_operand") - (match_operand 1 "const_int_operand") - (match_operand 2 "const_int_operand"))] - "ISA_HAS_PREFETCH" -{ - if (symbolic_operand (operands[0], GET_MODE (operands[0]))) - operands[0] = force_reg (GET_MODE (operands[0]), operands[0]); -}) - -(define_insn "prefetch_si_address" - [(prefetch (plus:SI (match_operand:SI 0 "register_operand" "r") - (match_operand:SI 3 "const_int_operand" "I")) - (match_operand:SI 1 "const_int_operand" "n") - (match_operand:SI 2 "const_int_operand" "n"))] - "ISA_HAS_PREFETCH && Pmode == SImode" - { return mips_emit_prefetch (operands); } - [(set_attr "type" "prefetch")]) - -(define_insn "prefetch_indexed_si" - [(prefetch (plus:SI (match_operand:SI 0 "register_operand" "r") - (match_operand:SI 3 "register_operand" "r")) - (match_operand:SI 1 "const_int_operand" "n") - (match_operand:SI 2 "const_int_operand" "n"))] - "ISA_HAS_PREFETCHX && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT && Pmode == SImode" - { return mips_emit_prefetch (operands); } - [(set_attr "type" "prefetchx")]) - -(define_insn "prefetch_si" - [(prefetch (match_operand:SI 0 "register_operand" "r") - (match_operand:SI 1 "const_int_operand" "n") - (match_operand:SI 2 "const_int_operand" "n"))] - "ISA_HAS_PREFETCH && Pmode == SImode" -{ - operands[3] = const0_rtx; - return mips_emit_prefetch (operands); +(define_insn "prefetch" + [(prefetch (match_operand:QI 0 "address_operand" "p") + (match_operand 1 "const_int_operand" "n") + (match_operand 2 "const_int_operand" "n"))] + "ISA_HAS_PREFETCH && TARGET_EXPLICIT_RELOCS" +{ + operands[1] = mips_prefetch_cookie (operands[1], operands[2]); + return "pref\t%1,%a0"; } [(set_attr "type" "prefetch")]) -(define_insn "prefetch_di_address" - [(prefetch (plus:DI (match_operand:DI 0 "register_operand" "r") - (match_operand:DI 3 "const_int_operand" "I")) - (match_operand:DI 1 "const_int_operand" "n") - (match_operand:DI 2 "const_int_operand" "n"))] - "ISA_HAS_PREFETCH && Pmode == DImode" - { return mips_emit_prefetch (operands); } - [(set_attr "type" "prefetch")]) - -(define_insn "prefetch_indexed_di" - [(prefetch (plus:DI (match_operand:DI 0 "register_operand" "r") - (match_operand:DI 3 "register_operand" "r")) - (match_operand:DI 1 "const_int_operand" "n") - (match_operand:DI 2 "const_int_operand" "n"))] - "ISA_HAS_PREFETCHX && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT && Pmode == DImode" - { return mips_emit_prefetch (operands); } - [(set_attr "type" "prefetchx")]) - -(define_insn "prefetch_di" - [(prefetch (match_operand:DI 0 "register_operand" "r") - (match_operand:DI 1 "const_int_operand" "n") - (match_operand:DI 2 "const_int_operand" "n"))] - "ISA_HAS_PREFETCH && Pmode == DImode" +(define_insn "*prefetch_indexed_<mode>" + [(prefetch (plus:P (match_operand:P 0 "register_operand" "d") + (match_operand:P 1 "register_operand" "d")) + (match_operand 2 "const_int_operand" "n") + (match_operand 3 "const_int_operand" "n"))] + "ISA_HAS_PREFETCHX && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" { - operands[3] = const0_rtx; - return mips_emit_prefetch (operands); + operands[2] = mips_prefetch_cookie (operands[2], operands[3]); + return "prefx\t%2,%1(%0)"; } - [(set_attr "type" "prefetch")]) + [(set_attr "type" "prefetchx")]) (define_insn "nop" [(const_int 0)] |