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| author | Mihailo Stojanovic <mistojanovic@wavecomp.com> | 2019-08-23 19:09:07 +0000 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 2019-08-23 13:09:07 -0600 |
| commit | e5bd4faa8bbe50e66105e1a14d38f3e884de74ef (patch) | |
| tree | 87a0beebacdb9888ed31eacf52b787459e60aee3 /gcc/config/mips/mips.md | |
| parent | ecd06a4cc09069a2bf8a0f7701b28fcb839f8732 (diff) | |
| download | gcc-e5bd4faa8bbe50e66105e1a14d38f3e884de74ef.tar.gz | |
mips.md (mips_get_fcsr, [...]): Use SI machine mode for unspec_volatile operand.
* config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
machine mode for unspec_volatile operand.
* gcc.target/mips/get-fcsr-3.c: New test.
From-SVN: r274864
Diffstat (limited to 'gcc/config/mips/mips.md')
| -rw-r--r-- | gcc/config/mips/mips.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 2ae1f7e0440..a9b0c86be07 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -7588,7 +7588,7 @@ ;; __builtin_mips_get_fcsr: move the FCSR into operand 0. (define_expand "mips_get_fcsr" [(set (match_operand:SI 0 "register_operand") - (unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))] + (unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))] "TARGET_HARD_FLOAT_ABI" { if (TARGET_MIPS16) @@ -7600,7 +7600,7 @@ (define_insn "*mips_get_fcsr" [(set (match_operand:SI 0 "register_operand" "=d") - (unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))] + (unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))] "TARGET_HARD_FLOAT" "cfc1\t%0,$31") |