diff options
| author | pinskia <pinskia@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-01-04 18:40:21 +0000 |
|---|---|---|
| committer | pinskia <pinskia@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-01-04 18:40:21 +0000 |
| commit | b75089094dd1ac7021a2dd3c8df3e32c2a373340 (patch) | |
| tree | 1e83a84dd840a340fd426cea3e908c98d25ff6bd /gcc/config/mips/mips.h | |
| parent | e4bff90df5768933bed5be131ca45071525864e9 (diff) | |
| download | gcc-b75089094dd1ac7021a2dd3c8df3e32c2a373340.tar.gz | |
2012-01-04 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* config/mips/mips.md (size): Add SI and DI.
(SIZE): New mode attribute.
(U): New code attribute.
* config/mips/mips-dsp.md (mips_lbux): Use gen_mips_lbux_extsi.
(mips_lbux_<mode>): Delete.
(mips_l<SHORT:size><u>x_ext<GPR:mode>_<P:mode>): New pattern.
(mips_lhx): Use gen_mips_lhx_extsi.
(mips_lhx_<mode>): Delete.
(mips_lwx): Delete.
(mips_l<size>x): New expand.
(mips_lwx_<mode>): Delete.
(mips_l<GPR:size>x_<P:mode>): New pattern.
(*mips_lw<u>x_<P:mode>_ext): Likewise.
* config/mips/mips-ftypes.def: Add DI f(POINTER, SI) function type.
* config/mips/mips.c (mips_lx_address_p): New function.
(mips_rtx_costs <case MEM>): Call mips_lx_address_p.
(dsp64): New availability predicate.
(mips_builtins): Add an entry for __builtin_mips_ldx.
* config/mips/mips.h (ISA_HAS_LBX): New define.
(ISA_HAS_LBUX): Likewise.
(ISA_HAS_LHX): Likewise.
(ISA_HAS_LHUX): Likewise.
(ISA_HAS_LWX): Likewise.
(ISA_HAS_LWUX): Likewise.
(ISA_HAS_LDX): Likewise.
* doc/extend.texi (__builtin_mips_ldx): Document.
2012-01-04 Andrew Pinski <apinski@cavium.com>
* gcc.target/mips/mips64-dsp-ldx1.c: New test.
* gcc.target/mips/octeon2-lx-1.c: New test.
* gcc.target/mips/mips64-dsp-ldx.c: New test.
* gcc.target/mips/octeon2-lx-2.c: New test.
* gcc.target/mips/octeon2-lx-3.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182884 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips/mips.h')
| -rw-r--r-- | gcc/config/mips/mips.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 23d40baf9a6..d07e241d0d6 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1,6 +1,7 @@ /* Definitions of target machine for GNU compiler. MIPS version. Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011 + 2012 Free Software Foundation, Inc. Contributed by A. Lichnewsky (lich@inria.inria.fr). Changed by Michael Meissner (meissner@osf.org). @@ -996,6 +997,16 @@ struct mips_cpu_info { /* ISA has lwxs instruction (load w/scaled index address. */ #define ISA_HAS_LWXS (TARGET_SMARTMIPS && !TARGET_MIPS16) +/* ISA has lbx, lbux, lhx, lhx, lhux, lwx, lwux, or ldx instruction. */ +#define ISA_HAS_LBX (TARGET_OCTEON2) +#define ISA_HAS_LBUX (ISA_HAS_DSP || TARGET_OCTEON2) +#define ISA_HAS_LHX (ISA_HAS_DSP || TARGET_OCTEON2) +#define ISA_HAS_LHUX (TARGET_OCTEON2) +#define ISA_HAS_LWX (ISA_HAS_DSP || TARGET_OCTEON2) +#define ISA_HAS_LWUX (TARGET_OCTEON2 && TARGET_64BIT) +#define ISA_HAS_LDX ((ISA_HAS_DSP || TARGET_OCTEON2) \ + && TARGET_64BIT) + /* The DSP ASE is available. */ #define ISA_HAS_DSP (TARGET_DSP && !TARGET_MIPS16) |