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authorechristo <echristo@138bc75d-0d04-0410-961f-82ee72b054a4>2002-06-12 23:26:44 +0000
committerechristo <echristo@138bc75d-0d04-0410-961f-82ee72b054a4>2002-06-12 23:26:44 +0000
commitd8c4db284ae7ae3efa6d39187caa0ecff2f3dae0 (patch)
treec8af9c2da4eb8eb753214caa4091eeea0d6a1e37 /gcc/config/mips/mips.h
parentf4deb41679edcfcb630eac395df09a85520b3e60 (diff)
downloadgcc-d8c4db284ae7ae3efa6d39187caa0ecff2f3dae0.tar.gz
2002-06-12 Eric Christopher <echristo@redhat.com>
From Chris Demetriou <cgd@broadcom.com> * config/mips/mips.h (ISA_HAS_FP4): Add ISA_MIPS64 and fix comment. (ISA_HAS_MADD_MSUB): Ditto. (ISA_HAS_NMADD_NMSUB): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@54569 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips/mips.h')
-rw-r--r--gcc/config/mips/mips.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index b68840f5e1b..7778361e859 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -751,22 +751,24 @@ extern void sbss_section PARAMS ((void));
|| ISA_MIPS64)
/* This is a catch all for the other new mips4 instructions: indexed load and
- indexed prefetch instructions, the FP madd,msub,nmadd, and nmsub instructions,
- and the FP recip and recip sqrt instructions */
-#define ISA_HAS_FP4 (ISA_MIPS4 \
+ indexed prefetch instructions, the FP madd,msub,nmadd, and nmsub
+ instructions, and the FP recip and recip sqrt instructions */
+#define ISA_HAS_FP4 ((ISA_MIPS4 \
+ || ISA_MIPS64) \
&& !TARGET_MIPS16)
/* ISA has conditional trap instructions. */
#define ISA_HAS_COND_TRAP (!ISA_MIPS1 \
&& !TARGET_MIPS16)
-/* ISA has multiply-accumulate instructions, madd and msub. */
+/* ISA has integer multiply-accumulate instructions, madd and msub. */
#define ISA_HAS_MADD_MSUB ((ISA_MIPS32 \
|| ISA_MIPS64 \
) && !TARGET_MIPS16)
-/* ISA has nmadd and nmsub instructions. */
-#define ISA_HAS_NMADD_NMSUB (ISA_MIPS4 \
+/* ISA has floating-point nmadd and nmsub instructions. */
+#define ISA_HAS_NMADD_NMSUB ((ISA_MIPS4 \
+ || ISA_MIPS64) \
&& ! TARGET_MIPS16)
/* ISA has count leading zeroes/ones instruction (not implemented). */