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| author | Alexandre Oliva <aoliva@redhat.com> | 2002-03-22 22:02:12 +0000 |
|---|---|---|
| committer | Alexandre Oliva <aoliva@gcc.gnu.org> | 2002-03-22 22:02:12 +0000 |
| commit | 7f48c9e1504132e59676f4fda5c61fd26c293f52 (patch) | |
| tree | da28417c589f53563216c82e703a1aebbee87565 /gcc/config/mips/mips.h | |
| parent | 909de5da19288f60ab09dbe6165399d3f833a692 (diff) | |
| download | gcc-7f48c9e1504132e59676f4fda5c61fd26c293f52.tar.gz | |
mips.h (MASK_RETURN_ADDR): Define.
* config/mips/mips.h (MASK_RETURN_ADDR): Define.
(TARGET_PTRMEMFUNC_VBIT_LOCATION): Define.
From-SVN: r51191
Diffstat (limited to 'gcc/config/mips/mips.h')
| -rw-r--r-- | gcc/config/mips/mips.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 7b01130a387..62bb9483d88 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -2423,6 +2423,17 @@ extern enum reg_class mips_char_to_class[256]; RETURN_ADDRESS_POINTER_REGNUM))) \ : (rtx) 0) +/* Since the mips16 ISA mode is encoded in the least-significant bit + of the address, mask it off return addresses for purposes of + finding exception handling regions. */ + +#define MASK_RETURN_ADDR GEN_INT (-2) + +/* Similarly, don't use the least-significant bit to tell pointers to + code from vtable index. */ + +#define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta + /* Structure to be filled in by compute_frame_size with register save masks, and offsets for the current function. */ |