* config.gcc: Don't include mips/abi64.h in $tm_file.

	* hard-reg-set.h (call_really_used_regs): Declare.
	* config/mips/abi64.h: Remove file.
	* config/mips/linux.h,
	* config/mips/iris6.h: Don't include it.
	* config/mips/mips-protos.h (mips_conditional_register_usage): Declare.
	* config/mips/mips.h (CONDITIONAL_REGISTER_USAGE): Use it.
	(REG_PARM_STACK_SPACE, STACK_BOUNDARY, STRICT_ARGUMENT_NAMING,
	FUNCTION_ARG_PASS_BY_REFERENCE, FUNCTION_ARG_PADDING,
	FUNCTION_ARG_CALLEE_COPIES, MUST_PASS_IN_STACK, MIPS_STACK_ALIGN):
	Bring across definitions from abi64.h.
	(GP_ARG_LAST, FP_ARG_LAST): Use MAX_ARGS_IN_REGISTERS.
	(BIGGEST_MAX_ARGS_IN_REGISTERS): New.
	(struct mips_args): Use it.
	* config/mips/mips.c (mips_conditional_register_usage): Define.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@55986 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 56 insertions, 0 deletions

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index f4b4e012275..c0795dc6cb4 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -5408,6 +5408,62 @@ override_options ()
   init_machine_status = &mips_init_machine_status;
 }
 
+/* Implement CONDITIONAL_REGISTER_USAGE.  */
+
+void
+mips_conditional_register_usage ()
+{
+  if (!TARGET_HARD_FLOAT)
+    {
+      int regno;
+
+      for (regno = FP_REG_FIRST; regno <= FP_REG_LAST; regno++)
+	fixed_regs[regno] = call_used_regs[regno] = 1;
+      for (regno = ST_REG_FIRST; regno <= ST_REG_LAST; regno++)
+	fixed_regs[regno] = call_used_regs[regno] = 1;
+    }
+  else if (! ISA_HAS_8CC)
+    {
+      int regno;
+
+      /* We only have a single condition code register.  We
+	 implement this by hiding all the condition code registers,
+	 and generating RTL that refers directly to ST_REG_FIRST.  */
+      for (regno = ST_REG_FIRST; regno <= ST_REG_LAST; regno++)
+	fixed_regs[regno] = call_used_regs[regno] = 1;
+    }
+  /* In mips16 mode, we permit the $t temporary registers to be used
+     for reload.  We prohibit the unused $s registers, since they
+     are caller saved, and saving them via a mips16 register would
+     probably waste more time than just reloading the value.  */
+  if (TARGET_MIPS16)
+    {
+      fixed_regs[18] = call_used_regs[18] = 1;
+      fixed_regs[19] = call_used_regs[19] = 1;
+      fixed_regs[20] = call_used_regs[20] = 1;
+      fixed_regs[21] = call_used_regs[21] = 1;
+      fixed_regs[22] = call_used_regs[22] = 1;
+      fixed_regs[23] = call_used_regs[23] = 1;
+      fixed_regs[26] = call_used_regs[26] = 1;
+      fixed_regs[27] = call_used_regs[27] = 1;
+      fixed_regs[30] = call_used_regs[30] = 1;
+    }
+  /* fp20-23 are now caller saved.  */
+  if (mips_abi == ABI_64)
+    {
+      int regno;
+      for (regno = FP_REG_FIRST + 20; regno < FP_REG_FIRST + 24; regno++)
+	call_really_used_regs[regno] = call_used_regs[regno] = 1;
+    }
+  /* odd registers from fp21 to fp31 are now caller saved.  */
+  if (mips_abi == ABI_N32 || mips_abi == ABI_MEABI)
+    {
+      int regno;
+      for (regno = FP_REG_FIRST + 21; regno <= FP_REG_FIRST + 31; regno+=2)
+	call_really_used_regs[regno] = call_used_regs[regno] = 1;
+    }
+}
+
 /* Allocate a chunk of memory for per-function machine-dependent data.  */
 static struct machine_function *
 mips_init_machine_status ()