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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2012-07-15 16:26:48 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2012-07-15 16:26:48 +0000
commit8ad8575fc6ced7eea5c4e8d5c14d9c4b362245d5 (patch)
tree846ab8c6d5cfb28d81663ba734f61630889563f9 /gcc/config/mips/mips-dsp.md
parentff5d8ce9c170fa2aaba1e052d56c6262f121a4f2 (diff)
downloadgcc-8ad8575fc6ced7eea5c4e8d5c14d9c4b362245d5.tar.gz
gcc/
* config/mips/mips.md (move_type): Replace mfhilo and mthilo with mflo and mtlo. (type): Split mfhilo into mfhi and mflo. Split mthilo into mthi and mtlo. Adjust move_type->type mapping. (may_clobber_hilo): Split mthilo into mthi and mtlo. (*movdi_32bit, *movdi_32bit_mips16, *movdi_64bit, *movdi_64bit_mips16) (*mov<mode>_internal, *mov<mode>_mips16, *movhi_internal) (*movhi_mips16, *movqi_internal, *movqi_mips16): Use mtlo and mflo instead of mthilo and mfhilo. (mfhi<GPR:mode>_<HILO:mode>): Use mfhi instead of mfhilo. (mthi<GPR:mode>_<HILO:mode>): Use mthi instead of mthilo. * config/mips/mips-dsp.md (mips_extr_w, mips_extr_r_w, mips_extr_rs_w) (mips_extr_s_h, mips_extp, mips_extpdp, mips_shilo, mips_mthlip): Use mflo instead of mfhilo. * config/mips/10000.md (r10k_arith): Split mthilo. (r10k_mfhi, r10k_mflo): Use mfhi and mflo directly. * config/mips/sb1.md (ir_sb1_mfhi, ir_sb1_mflo): Likewise. (ir_sb1_mthilo): Split mthilo into mthi and mtlo. * config/mips/20kc.md (r20kc_imthilo, r20kc_imfhilo): Split mthilo and mfhilo. * config/mips/24k.md (r24k_int_mfhilo, r24k_int_mthilo): Likewise. * config/mips/4130.md (vr4130_class, vr4130_mfhilo, vr4130_mthilo): Likewise. * config/mips/4k.md (r4k_int_mthilo, r4k_int_mfhilo): Likewise. * config/mips/5400.md (ir_vr54_hilo): Likewise. * config/mips/5500.md (ir_vr55_mthilo, ir_vr55_mfhilo): Likewise. * config/mips/5k.md (r5k_int_mthilo, r5k_int_mfhilo): Likewise. * config/mips/7000.md (rm7_mthilo, rm7_mfhilo): Likewise. * config/mips/74k.md (r74k_int_mfhilo, r74k_int_mthilo): Likewise. * config/mips/9000.md (rm9k_mfhilo, rm9k_mthilo): Likewise. * config/mips/generic.md (generic_hilo): Likewise. * config/mips/loongson2ef.md (ls2_alu): Likewise. * config/mips/loongson3a.md (ls3a_mfhilo): Likewise. * config/mips/octeon.md (octeon_imul_o1, octeon_imul_o2) (octeon_mfhilo_o1, octeon_mfhilo_o2): Likewise. * config/mips/sr71k.md (ir_sr70_hilo): Likewise. * config/mips/xlr.md (xlr_hilo): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@189496 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips/mips-dsp.md')
-rw-r--r--gcc/config/mips/mips-dsp.md16
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/mips/mips-dsp.md b/gcc/config/mips/mips-dsp.md
index 1b60ad23c59..c2a89e1b5a3 100644
--- a/gcc/config/mips/mips-dsp.md
+++ b/gcc/config/mips/mips-dsp.md
@@ -909,7 +909,7 @@
}
return "extrv.w\t%0,%q1,%2";
}
- [(set_attr "type" "mfhilo")
+ [(set_attr "type" "mflo")
(set_attr "mode" "SI")])
(define_insn "mips_extr_r_w"
@@ -930,7 +930,7 @@
}
return "extrv_r.w\t%0,%q1,%2";
}
- [(set_attr "type" "mfhilo")
+ [(set_attr "type" "mflo")
(set_attr "mode" "SI")])
(define_insn "mips_extr_rs_w"
@@ -951,7 +951,7 @@
}
return "extrv_rs.w\t%0,%q1,%2";
}
- [(set_attr "type" "mfhilo")
+ [(set_attr "type" "mflo")
(set_attr "mode" "SI")])
;; EXTR*_S.H
@@ -973,7 +973,7 @@
}
return "extrv_s.h\t%0,%q1,%2";
}
- [(set_attr "type" "mfhilo")
+ [(set_attr "type" "mflo")
(set_attr "mode" "SI")])
;; EXTP*
@@ -996,7 +996,7 @@
}
return "extpv\t%0,%q1,%2";
}
- [(set_attr "type" "mfhilo")
+ [(set_attr "type" "mflo")
(set_attr "mode" "SI")])
(define_insn "mips_extpdp"
@@ -1021,7 +1021,7 @@
}
return "extpdpv\t%0,%q1,%2";
}
- [(set_attr "type" "mfhilo")
+ [(set_attr "type" "mflo")
(set_attr "mode" "SI")])
;; SHILO*
@@ -1040,7 +1040,7 @@
}
return "shilov\t%q0,%2";
}
- [(set_attr "type" "mfhilo")
+ [(set_attr "type" "mflo")
(set_attr "mode" "SI")])
;; MTHLIP*
@@ -1056,7 +1056,7 @@
(reg:CCDSP CCDSP_PO_REGNUM)] UNSPEC_MTHLIP))])]
"ISA_HAS_DSP && !TARGET_64BIT"
"mthlip\t%2,%q0"
- [(set_attr "type" "mfhilo")
+ [(set_attr "type" "mflo")
(set_attr "mode" "SI")])
;; WRDSP