summaryrefslogtreecommitdiff
path: root/gcc/config/mips/4600.md
diff options
context:
space:
mode:
authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2012-05-31 21:32:01 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2012-05-31 21:32:01 +0000
commit3918c286015305a3e3b7e6579f38b07caa1cc0cf (patch)
tree78f964082b19fad317f6ae5bb15c6c426f4baac7 /gcc/config/mips/4600.md
parentb5369b7d7585d2933fac147ad1da173c217c1260 (diff)
downloadgcc-3918c286015305a3e3b7e6579f38b07caa1cc0cf.tar.gz
gcc/
2012-02-24 Matt Turner <mattst88@gmail.com> * config/mips/4600.md (r4600_imul_si): Rename from r4600_imul. (r4600_imul_di): New. (r4600_idiv_si): Rename from r4600_idiv. (r4600_idiv_di): New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@188083 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/mips/4600.md')
-rw-r--r--gcc/config/mips/4600.md24
1 files changed, 19 insertions, 5 deletions
diff --git a/gcc/config/mips/4600.md b/gcc/config/mips/4600.md
index c645cbc5d82..fcdbf00d261 100644
--- a/gcc/config/mips/4600.md
+++ b/gcc/config/mips/4600.md
@@ -1,5 +1,5 @@
;; R4600 and R4650 pipeline description.
-;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
+;; Copyright (C) 2004, 2005, 2007, 2012 Free Software Foundation, Inc.
;;
;; This file is part of GCC.
@@ -24,16 +24,30 @@
;; We handle the R4600 and R4650 in much the same way. The only difference
;; is in the integer multiplication and division costs.
-(define_insn_reservation "r4600_imul" 10
+(define_insn_reservation "r4600_imul_si" 10
(and (eq_attr "cpu" "r4600")
- (eq_attr "type" "imul,imul3,imadd"))
+ (eq_attr "type" "imul,imul3,imadd")
+ (eq_attr "mode" "SI"))
"imuldiv*10")
-(define_insn_reservation "r4600_idiv" 42
+(define_insn_reservation "r4600_imul_di" 12
(and (eq_attr "cpu" "r4600")
- (eq_attr "type" "idiv"))
+ (eq_attr "type" "imul,imul3,imadd")
+ (eq_attr "mode" "DI"))
+ "imuldiv*12")
+
+(define_insn_reservation "r4600_idiv_si" 42
+ (and (eq_attr "cpu" "r4600")
+ (eq_attr "type" "idiv")
+ (eq_attr "mode" "SI"))
"imuldiv*42")
+(define_insn_reservation "r4600_idiv_di" 74
+ (and (eq_attr "cpu" "r4600")
+ (eq_attr "type" "idiv")
+ (eq_attr "mode" "DI"))
+ "imuldiv*74")
+
(define_insn_reservation "r4650_imul" 4
(and (eq_attr "cpu" "r4650")