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| author | eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-07-23 21:09:50 +0000 |
|---|---|---|
| committer | eager <eager@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-07-23 21:09:50 +0000 |
| commit | c4fcbf4cd03c11aa1bc707b00dd95ba52f963b39 (patch) | |
| tree | dedeb3a06148a8bab7e5717aa45639006ee9a7c0 /gcc/config/microblaze/sync.md | |
| parent | f7f93ac41925f166c86949f7b89fbd49a0b1f977 (diff) | |
| download | gcc-c4fcbf4cd03c11aa1bc707b00dd95ba52f963b39.tar.gz | |
* config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk
and define TARGET_ASM_OUTPUT_MI_THUNK and
TARGET_ASM_CAN_OUTPUT_MI_THUNK.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201185 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/microblaze/sync.md')
| -rw-r--r-- | gcc/config/microblaze/sync.md | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/gcc/config/microblaze/sync.md b/gcc/config/microblaze/sync.md new file mode 100644 index 00000000000..d880422f818 --- /dev/null +++ b/gcc/config/microblaze/sync.md @@ -0,0 +1,43 @@ +;; Machine description for Xilinx MicroBlaze synchronization instructions. +;; Copyright (C) 2011-2013 Free Software Foundation, Inc. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published +;; by the Free Software Foundation; either version 3, or (at your +;; option) any later version. +;; +;; GCC is distributed in the hope that it will be useful, but WITHOUT +;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +;; License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; <http://www.gnu.org/licenses/>. + +(define_insn "atomic_compare_and_swapsi" + [(match_operand:SI 0 "register_operand" "=&d") ;; bool output + (match_operand:SI 1 "register_operand" "=&d") ;; val output + (match_operand:SI 2 "nonimmediate_operand" "+Q") ;; memory + (match_operand:SI 3 "register_operand" "d") ;; expected value + (match_operand:SI 4 "register_operand" "d") ;; desired value + (match_operand:SI 5 "const_int_operand" "") ;; is_weak + (match_operand:SI 6 "const_int_operand" "") ;; mod_s + (match_operand:SI 7 "const_int_operand" "") ;; mod_f + (clobber (match_scratch:SI 8 "=&d"))] + "" + { + output_asm_insn ("addc \tr0,r0,r0", operands); + output_asm_insn ("lwx \t%1,%y2,r0", operands); + output_asm_insn ("addic\t%8,r0,0", operands); + output_asm_insn ("bnei \t%8,.-8", operands); + output_asm_insn ("cmp \t%0,%1,%3", operands); + output_asm_insn ("bnei \t%0,.+16", operands); + output_asm_insn ("swx \t%4,%y2,r0", operands); + output_asm_insn ("addic\t%8,r0,0", operands); + output_asm_insn ("bnei \t%8,.-28", operands); + return ""; + } +) |