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authorschwab <schwab@138bc75d-0d04-0410-961f-82ee72b054a4>2013-05-15 16:10:59 +0000
committerschwab <schwab@138bc75d-0d04-0410-961f-82ee72b054a4>2013-05-15 16:10:59 +0000
commite2be515af09e2aa25f43b973f737e93a06ebe27b (patch)
tree3093a0589fcc05ef3f76e89d066851f44b409654 /gcc/config/m68k
parent3c7a63e3227646d2e0412f16701694ef8907b602 (diff)
downloadgcc-e2be515af09e2aa25f43b973f737e93a06ebe27b.tar.gz
* config/m68k/m68k.md (*rotlhi3_lowpart, *rotlqi3_lowpart): Name
for rotlhi3+1 and rotlqi3+1, resp. Fix reference to non-existing third operand. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198940 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m68k')
-rw-r--r--gcc/config/m68k/m68k.md20
1 files changed, 10 insertions, 10 deletions
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index abf4b61b583..719b86bf380 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -5211,19 +5211,19 @@
return "rol%.w %2,%0";
})
-(define_insn ""
+(define_insn "*rotlhi3_lowpart"
[(set (strict_low_part (match_operand:HI 0 "register_operand" "+d"))
(rotate:HI (match_dup 0)
(match_operand:HI 1 "general_operand" "dIP")))]
"!TARGET_COLDFIRE"
{
- if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 8)
+ if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) >= 8)
{
- operands[2] = GEN_INT (16 - INTVAL (operands[2]));
- return "ror%.w %2,%0";
+ operands[1] = GEN_INT (16 - INTVAL (operands[1]));
+ return "ror%.w %1,%0";
}
else
- return "rol%.w %2,%0";
+ return "rol%.w %1,%0";
})
(define_insn "rotlqi3"
@@ -5241,19 +5241,19 @@
return "rol%.b %2,%0";
})
-(define_insn ""
+(define_insn "*rotlqi3_lowpart"
[(set (strict_low_part (match_operand:QI 0 "register_operand" "+d"))
(rotate:QI (match_dup 0)
(match_operand:QI 1 "general_operand" "dI")))]
"!TARGET_COLDFIRE"
{
- if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 4)
+ if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) >= 4)
{
- operands[2] = GEN_INT (8 - INTVAL (operands[2]));
- return "ror%.b %2,%0";
+ operands[1] = GEN_INT (8 - INTVAL (operands[1]));
+ return "ror%.b %1,%0";
}
else
- return "rol%.b %2,%0";
+ return "rol%.b %1,%0";
})
(define_insn "rotrsi3"