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authorkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2005-05-26 18:15:27 +0000
committerkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2005-05-26 18:15:27 +0000
commit442e3cb9a0815e003691e42e3aac7447cbcdc335 (patch)
tree86419139bff82ade0a6b2ca63276803b131a6d0b /gcc/config/m68hc11
parent483650218bc49133ba69faad6fc5931d2636a594 (diff)
downloadgcc-442e3cb9a0815e003691e42e3aac7447cbcdc335.tar.gz
* c-common.c, c-parser.c, cfgbuild.c, cfghooks.c, cfghooks.h,
cfgrtl.c, cgraphunit.c, ddg.c, expr.h, gcse.c, ggc-page.c, ggc-zone.c, gimplify.c, ipa-inline.c, longlong.h, targhooks.c, tree-flow-inline.h, tree-pass.h, tree-ssa-dse.c, tree-ssa-loop-im.c, tree-ssa-loop-ivopts.c, tree-ssa-operands.c, tree-vect-analyze.c, tree-vect-transform.c, tree-vectorizer.c, tree.c, config/arm/arm.c, config/bfin/bfin.c, config/frv/frv.c, config/frv/frv.md, config/i386/i386.c, config/i386/sse.md, config/m68hc11/m68hc11.c, config/m68hc11/m68hc11.h, config/mcore/mcore.c, config/mips/mips.c, config/mips/mips.md, config/rs6000/darwin-ldouble.c, config/rs6000/rs6000.c, config/rs6000/rs6000.h, config/sh/sh.c, config/sh/sh.md, config/sh/ushmedia.h, config/sparc/sparc.c, config/sparc/sparc.md, config/stormy16/stormy-abi: Fix comment typos. Follow spelling conventions. * doc/invoke.texi, doc/tm.texi, doc/tree-ssa.texi: Fix typos. Follow spelling conventions. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@100218 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m68hc11')
-rw-r--r--gcc/config/m68hc11/m68hc11.c2
-rw-r--r--gcc/config/m68hc11/m68hc11.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/m68hc11/m68hc11.c b/gcc/config/m68hc11/m68hc11.c
index fca34d27e2f..30f2ff9e740 100644
--- a/gcc/config/m68hc11/m68hc11.c
+++ b/gcc/config/m68hc11/m68hc11.c
@@ -5018,7 +5018,7 @@ m68hc11_reorg (void)
replacement, unshare everything. */
unshare_all_rtl_again (first);
- /* Force a split of all splitable insn. This is necessary for the
+ /* Force a split of all splittable insn. This is necessary for the
Z register replacement mechanism because we end up with basic insns. */
split_all_insns_noflow ();
split_done = 1;
diff --git a/gcc/config/m68hc11/m68hc11.h b/gcc/config/m68hc11/m68hc11.h
index bdbe31ef66f..7ec76bf7cbd 100644
--- a/gcc/config/m68hc11/m68hc11.h
+++ b/gcc/config/m68hc11/m68hc11.h
@@ -450,7 +450,7 @@ SOFT_REG_FIRST+28, SOFT_REG_FIRST+29,SOFT_REG_FIRST+30,SOFT_REG_FIRST+31
For any two classes, it is very desirable that there be another
class that represents their union. */
-/* The M68hc11 has so fiew registers that it's not possible for GCC to
+/* The M68hc11 has so few registers that it's not possible for GCC to
do any register allocation without breaking. We extend the processor
registers by having soft registers. These registers are treated as
hard registers by GCC but they are located in memory and accessed by page0