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authorciceron <ciceron@138bc75d-0d04-0410-961f-82ee72b054a4>2003-03-10 21:51:02 +0000
committerciceron <ciceron@138bc75d-0d04-0410-961f-82ee72b054a4>2003-03-10 21:51:02 +0000
commit4575b101c30fbbe052b63284ac80eab4f5f5b205 (patch)
tree9e15ec492f91c32505421967bbb38a6c1c83c621 /gcc/config/m68hc11/m68hc11.md
parent8121e878217e5d148b6450b3e140ad0e01314b46 (diff)
downloadgcc-4575b101c30fbbe052b63284ac80eab4f5f5b205.tar.gz
* config/m68hc11/m68hc11.md ("*addhi3_68hc12"): Accept any constant
when adding to X and Y since leax/leay are fast. ("*addhi3"): Accept 'I' constraint when adding to address register. ("rotlhi3"): Operand 1 must be a register_operand. (peephole2): New peephole to optimize some adds. * config/m68hc11/m68hc11.h (CONST_OK_FOR_LETTER_P): Use 'I' constraint to represent -2 .. 2 small integer range. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@64127 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m68hc11/m68hc11.md')
-rw-r--r--gcc/config/m68hc11/m68hc11.md35
1 files changed, 29 insertions, 6 deletions
diff --git a/gcc/config/m68hc11/m68hc11.md b/gcc/config/m68hc11/m68hc11.md
index 4841aebf003..99c11b6dc59 100644
--- a/gcc/config/m68hc11/m68hc11.md
+++ b/gcc/config/m68hc11/m68hc11.md
@@ -2089,9 +2089,9 @@
}")
(define_insn "*addhi3_68hc12"
- [(set (match_operand:HI 0 "register_operand" "=xy,d,xy*z*w,xy*z*w,xy*z")
+ [(set (match_operand:HI 0 "register_operand" "=xyd,d,xy*z*w,xy*z*w,xy*z")
(plus:HI (match_operand:HI 1 "register_operand" "%0,0,0,xy*zw,0")
- (match_operand:HI 2 "general_operand" "N,im*A*wu,id,id,!mu*A")))]
+ (match_operand:HI 2 "general_operand" "i,m*A*wu,id,id,!mu*A")))]
"TARGET_M6812"
"*
{
@@ -2278,9 +2278,9 @@
}")
(define_insn "*addhi3"
- [(set (match_operand:HI 0 "hard_reg_operand" "=A,d,!A,d*A,!d*A")
- (plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0")
- (match_operand:HI 2 "general_operand" "N,i,I,mi*A*d,!u*d*w")))]
+ [(set (match_operand:HI 0 "hard_reg_operand" "=A,dA,d,!A,d*A,!d*A")
+ (plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0,0")
+ (match_operand:HI 2 "general_operand" "N,I,i,I,mi*A*d,!u*d*w")))]
"TARGET_M6811"
"*
{
@@ -5812,7 +5812,7 @@
(define_expand "rotlhi3"
[(set (match_operand:HI 0 "register_operand" "")
- (rotate:HI (match_operand:HI 1 "general_operand" "")
+ (rotate:HI (match_operand:HI 1 "register_operand" "")
(match_operand:HI 2 "general_operand" "")))]
""
"
@@ -6784,6 +6784,29 @@
"")
;;
+;; Replace a "ldd <mem>; addd #N; std <mem>" into a
+;; "ldx <mem>; leax; stx <mem>" if we have a free X/Y register
+;; and the constant is small.
+;;
+(define_peephole2
+ [(set (match_operand:HI 0 "hard_reg_operand" "")
+ (match_operand:HI 1 "general_operand" ""))
+ (set (match_dup 0) (plus:HI (match_dup 0)
+ (match_operand:HI 2 "const_int_operand" "")))
+ (set (match_operand:HI 3 "nonimmediate_operand" "")
+ (match_dup 0))
+ (match_scratch:HI 4 "xy")]
+ "D_REG_P (operands[0])
+ && (TARGET_M6812
+ || (INTVAL (operands[2]) >= -2 && INTVAL (operands[2]) <= 2))
+ && peep2_reg_dead_p (3, operands[0])"
+ [(set (match_dup 4) (match_dup 1))
+ (set (match_dup 4) (plus:HI (match_dup 4) (match_dup 2)))
+ (set (match_dup 3) (match_dup 4))]
+ "if (reg_mentioned_p (operands[4], operands[1])) FAIL;
+ if (reg_mentioned_p (operands[4], operands[3])) FAIL;")
+
+;;
;; This peephole catches the address computations generated by the reload
;; pass.
(define_peephole