Merge in gcc2-ss-010999

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@29150 138bc75d-0d04-0410-961f-82ee72b054a4

3 files changed, 33 insertions, 36 deletions

diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index 685de334629..8bc569863ef 100644
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -1,5 +1,5 @@
 /* Subroutines used for code generation on the Mitsubishi M32R cpu.
-   Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+   Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
 
 This file is part of GNU CC.
 
@@ -938,18 +938,15 @@ m32r_select_cc_mode (op, x, y)
    than being susummed into the following branch instruction. */
 
 rtx
-gen_compare (int_code, x, y, need_compare)
-     int	   int_code;
-     rtx           x;
-     rtx           y;
-     int           need_compare;
+gen_compare (code, x, y, need_compare)
+     enum rtx_code code;
+     rtx x, y;
+     int need_compare;
 {
-  enum rtx_code     code = (enum rtx_code)int_code;
-  enum rtx_code     compare_code;
-  enum rtx_code     branch_code;
-  enum machine_mode mode      = SELECT_CC_MODE (code, x, y);
-  rtx               cc_reg    = gen_rtx (REG, mode, CARRY_REGNUM);
-  int               must_swap = 0;
+  enum machine_mode mode = SELECT_CC_MODE (code, x, y);
+  enum rtx_code compare_code, branch_code;
+  rtx cc_reg = gen_rtx_REG (mode, CARRY_REGNUM);
+  int swap_p = 0;
 
   switch (code)
     {
@@ -1336,9 +1333,9 @@ m32r_setup_incoming_varargs (cum, int_mode, type, pretend_size, no_rtl)
       int size = M32R_MAX_PARM_REGS - first_reg_offset;
       rtx regblock;
 
-      regblock = gen_rtx (MEM, BLKmode,
-			  plus_constant (arg_pointer_rtx,
-					 FIRST_PARM_OFFSET (0)));
+      regblock = gen_rtx_MEM (BLKmode,
+			      plus_constant (arg_pointer_rtx,
+					     FIRST_PARM_OFFSET (0)));
       MEM_ALIAS_SET (regblock) = get_varargs_alias_set ();
       move_block_from_reg (first_reg_offset, regblock,
 			   size, size * UNITS_PER_WORD);
diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h
index 903745f328f..7cad6c0f71b 100644
--- a/gcc/config/m32r/m32r.h
+++ b/gcc/config/m32r/m32r.h
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
-   Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+   Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
 
 This file is part of GNU CC.
 
@@ -706,10 +706,12 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size)
 /* The current return address is in r14.  */
 #if 0 /* The default value should work.  */
 #define RETURN_ADDR_RTX(COUNT, FRAME) \
-(((COUNT) == -1)				\
- ? gen_rtx (REG, Pmode, 14)			\
- : copy_to_reg (gen_rtx (MEM, Pmode,		\
-			 memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD)))))
+(((COUNT) == -1)							\
+ ? gen_rtx_REG (Pmode, 14)						\
+ : copy_to_reg (gen_rtx_MEM (Pmode,					\
+			     memory_address (Pmode,			\
+					     plus_constant ((FRAME),	\
+							    UNITS_PER_WORD)))))
 #endif
 
 /* Register to use for pushing function arguments.  */
@@ -918,14 +920,14 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size)
    and the rest are pushed.  */
 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
 (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))				\
- ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)))	\
+ ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)))	\
  : 0)
 
 /* ??? Quick hack to try to get varargs working the normal way.  */
 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
 (((! current_function_varargs || (NAMED))				\
   && PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)))			\
- ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)))	\
+ ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)))	\
  : 0)
 
 /* A C expression for the number of words, at the beginning of an
@@ -1011,11 +1013,11 @@ m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
    VALTYPE is the data type of the value (as a tree).
    If the precise function being called is known, FUNC is its FUNCTION_DECL;
    otherwise, FUNC is 0.  */
-#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
+#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
 
 /* Define how to find the value returned by a library function
    assuming the value has mode MODE.  */
-#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
+#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
 
 /* 1 if N is a possible register number for a function value
    as seen by the caller.  */
@@ -1095,13 +1097,13 @@ m32r_output_function_epilogue (FILE, SIZE)
    CXT is an RTX for the static chain value for the function.  */
 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
 do { \
-  emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 0)), \
+  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \
 		  plus_constant ((CXT), 0xe7000000)); \
-  emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \
+  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \
 		  plus_constant ((FNADDR), 0xe6000000)); \
-  emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), \
+  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \
 		  GEN_INT (0x1fc67000)); \
-  emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \
+  emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \
 } while (0)
 
 /* Library calls.  */
diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md
index 3f1e6e51f71..85ab2530e1f 100644
--- a/gcc/config/m32r/m32r.md
+++ b/gcc/config/m32r/m32r.md
@@ -1,5 +1,5 @@
 ;; Machine description of the Mitsubishi M32R cpu for GNU C compiler
-;; Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+;; Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
 
 ;; This file is part of GNU CC.
 
@@ -684,11 +684,11 @@
       op0_subword = SUBREG_WORD (operand0);
       operand0 = XEXP (operand0, 0);
     }
-  emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1,
-					 op1_subword),
+  emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1,
+						op1_subword),
 			  shift_24));
   if (GET_MODE (operand0) != SImode)
-    operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subword);
+    operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subword);
   emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
   DONE;
 }")
@@ -717,8 +717,7 @@
       operand1 = XEXP (operand1, 0);
     }
 
-  emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1,
-					 op1_subword),
+  emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword),
 			  shift_24));
   emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
   DONE;
@@ -748,8 +747,7 @@
       operand1 = XEXP (operand1, 0);
     }
 
-  emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1,
-					 op1_subword),
+  emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword),
 			  shift_16));
   emit_insn (gen_ashrsi3 (operand0, temp, shift_16));
   DONE;