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| author | Jeff Law <law@gcc.gnu.org> | 1999-09-06 23:49:18 -0600 |
|---|---|---|
| committer | Jeff Law <law@gcc.gnu.org> | 1999-09-06 23:49:18 -0600 |
| commit | c5c7673583c6310e7f8e45704fdc4aadff33e393 (patch) | |
| tree | f1a67b6ea75a7f0da3f06e0a1c60b213f4403168 /gcc/config/m32r/m32r.md | |
| parent | ad85216ece38be37dacbbb3fa7bb7db69aa33a4b (diff) | |
| download | gcc-c5c7673583c6310e7f8e45704fdc4aadff33e393.tar.gz | |
Merge in gcc2-ss-010999
From-SVN: r29150
Diffstat (limited to 'gcc/config/m32r/m32r.md')
| -rw-r--r-- | gcc/config/m32r/m32r.md | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md index 3f1e6e51f71..85ab2530e1f 100644 --- a/gcc/config/m32r/m32r.md +++ b/gcc/config/m32r/m32r.md @@ -1,5 +1,5 @@ ;; Machine description of the Mitsubishi M32R cpu for GNU C compiler -;; Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. +;; Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -684,11 +684,11 @@ op0_subword = SUBREG_WORD (operand0); operand0 = XEXP (operand0, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, + op1_subword), shift_24)); if (GET_MODE (operand0) != SImode) - operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subword); + operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subword); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; }") @@ -717,8 +717,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; @@ -748,8 +747,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_16)); emit_insn (gen_ashrsi3 (operand0, temp, shift_16)); DONE; |