diff options
| author | dj <dj@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-11-06 17:57:15 +0000 |
|---|---|---|
| committer | dj <dj@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-11-06 17:57:15 +0000 |
| commit | 09a686a03d86047946fd7b4ff6f41a6119b569c0 (patch) | |
| tree | 4108cc8ae8bf7cb695afcfa9288ee9f126c6df7d /gcc/config/m32c | |
| parent | 53597a5597e4fc834b58231ffa0f44c3220fe341 (diff) | |
| download | gcc-09a686a03d86047946fd7b4ff6f41a6119b569c0.tar.gz | |
* config/m32c/cond.md (movqicc_<code>_<mode>): Remove mode of
conditional.
(movhicc_<code>_<mode>): Likewise.
* config/m32c/m32c.c (encode_pattern_1): Specialise PSImode
subregs.
(m32c_eh_return_data_regno): Change to using memregs to avoid
tying up all the compute regs.
(m32c_legitimate_address_p) Subregs are not valid addresses.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217200 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/m32c')
| -rw-r--r-- | gcc/config/m32c/cond.md | 16 | ||||
| -rw-r--r-- | gcc/config/m32c/m32c.c | 12 |
2 files changed, 15 insertions, 13 deletions
diff --git a/gcc/config/m32c/cond.md b/gcc/config/m32c/cond.md index 5f3fd1618c1..aebdcaf6bcb 100644 --- a/gcc/config/m32c/cond.md +++ b/gcc/config/m32c/cond.md @@ -204,8 +204,8 @@ (define_insn_and_split "movqicc_<code>_<mode>" [(set (match_operand:QI 0 "register_operand" "=R0w") - (if_then_else:QI (eqne_cond:QI (match_operand:QHPSI 1 "mra_operand" "RraSd") - (match_operand:QHPSI 2 "mrai_operand" "RraSdi")) + (if_then_else:QI (eqne_cond (match_operand:QHPSI 1 "mra_operand" "RraSd") + (match_operand:QHPSI 2 "mrai_operand" "RraSdi")) (match_operand:QI 3 "const_int_operand" "") (match_operand:QI 4 "const_int_operand" "")))] "" @@ -215,7 +215,7 @@ (compare (match_dup 1) (match_dup 2))) (set (match_dup 0) - (if_then_else:QI (eqne_cond:QI (reg:CC FLG_REGNO) (const_int 0)) + (if_then_else:QI (eqne_cond (reg:CC FLG_REGNO) (const_int 0)) (match_dup 3) (match_dup 4)))] "" @@ -224,10 +224,10 @@ (define_insn_and_split "movhicc_<code>_<mode>" [(set (match_operand:HI 0 "register_operand" "=R0w") - (if_then_else:HI (eqne_cond:HI (match_operand:QHPSI 1 "mra_operand" "RraSd") - (match_operand:QHPSI 2 "mrai_operand" "RraSdi")) - (match_operand:QI 3 "const_int_operand" "") - (match_operand:QI 4 "const_int_operand" "")))] + (if_then_else:HI (eqne_cond (match_operand:QHPSI 1 "mra_operand" "RraSd") + (match_operand:QHPSI 2 "mrai_operand" "RraSdi")) + (match_operand:HI 3 "const_int_operand" "") + (match_operand:HI 4 "const_int_operand" "")))] "TARGET_A24" "#" "reload_completed" @@ -235,7 +235,7 @@ (compare (match_dup 1) (match_dup 2))) (set (match_dup 0) - (if_then_else:HI (eqne_cond:HI (reg:CC FLG_REGNO) (const_int 0)) + (if_then_else:HI (eqne_cond (reg:CC FLG_REGNO) (const_int 0)) (match_dup 3) (match_dup 4)))] "" diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c index 6197b33e20d..fa0e883c37d 100644 --- a/gcc/config/m32c/m32c.c +++ b/gcc/config/m32c/m32c.c @@ -195,6 +195,9 @@ encode_pattern_1 (rtx x) if (GET_MODE_SIZE (GET_MODE (x)) != GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) *patternp++ = 'S'; + if (GET_MODE (x) == PSImode + && GET_CODE (XEXP (x, 0)) == REG) + *patternp++ = 'S'; encode_pattern_1 (XEXP (x, 0)); break; case MEM: @@ -1008,12 +1011,9 @@ m32c_eh_return_data_regno (int n) switch (n) { case 0: - return A0_REGNO; + return MEM0_REGNO; case 1: - if (TARGET_A16) - return R3_REGNO; - else - return R1_REGNO; + return MEM0_REGNO+4; default: return INVALID_REGNUM; } @@ -1790,6 +1790,8 @@ m32c_legitimate_address_p (machine_mode mode, rtx x, bool strict) /* case SB_REGNO: */ return 1; default: + if (GET_CODE (reg) == SUBREG) + return 0; if (IS_PSEUDO (reg, strict)) return 1; return 0; |