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author | ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-03-03 10:41:00 +0000 |
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committer | ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-03-03 10:41:00 +0000 |
commit | 765568b02e32831b30d682e638cf5642cae36a8d (patch) | |
tree | ce4fa0088e24bfde43c84745d25dd563ac14ee7c /gcc/config/ia64 | |
parent | c1df982e759454f156181b0dcef22aa581f39db7 (diff) | |
download | gcc-765568b02e32831b30d682e638cf5642cae36a8d.tar.gz |
* config/ia64/ia64.c (expand_vec_perm_interleave_2): Use gen_raw_REG
to create a register in testing mode.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221139 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/ia64')
-rw-r--r-- | gcc/config/ia64/ia64.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 6ef22d99705..5132d2f94e6 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -11570,7 +11570,10 @@ expand_vec_perm_interleave_2 (struct expand_vec_perm_d *d) gcc_assert (e < nelt); dfinal.perm[i] = e; } - dfinal.op0 = gen_reg_rtx (dfinal.vmode); + if (d->testing_p) + dfinal.op0 = gen_raw_REG (dfinal.vmode, LAST_VIRTUAL_REGISTER + 1); + else + dfinal.op0 = gen_reg_rtx (dfinal.vmode); dfinal.op1 = dfinal.op0; dfinal.one_operand_p = true; dremap.target = dfinal.op0; |