diff options
author | jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-03-26 16:00:52 +0000 |
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committer | jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-03-26 16:00:52 +0000 |
commit | 053129ba15ac1fbafeab3001731cd0a5740b7d36 (patch) | |
tree | bcd718c3205afeb4ccd10f2f2f95cbb6a43944ff /gcc/config/ia64 | |
parent | 0a2ba80f6f98ea1f83e13d516b74672ca1efdc10 (diff) | |
download | gcc-053129ba15ac1fbafeab3001731cd0a5740b7d36.tar.gz |
* config/ia64/ia64.c (ia64_expand_op_and_fetch): Fix comment.
(ia64_expand_compare_and_swap): Use always DImode ar.ccv,
zero extend old to it.
* config/ia64/ia64.md (cmpxchg_acq_si): Remove mode from ccv
operand.
* gcc.dg/ia64-sync-3.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@64895 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/ia64')
-rw-r--r-- | gcc/config/ia64/ia64.c | 13 | ||||
-rw-r--r-- | gcc/config/ia64/ia64.md | 2 |
2 files changed, 11 insertions, 4 deletions
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 01ed5d95c1e..b74dd593cb2 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -8047,7 +8047,7 @@ ia64_expand_fetch_and_op (binoptab, mode, arglist, target) do { old = tmp; ar.ccv = tmp; - ret = tmp + value; + ret = tmp <op> value; cmpxchgsz.acq tmp = [ptr], ret } while (tmp != old) */ @@ -8150,8 +8150,15 @@ ia64_expand_compare_and_swap (mode, boolp, arglist, target) else tmp = gen_reg_rtx (mode); - ccv = gen_rtx_REG (mode, AR_CCV_REGNUM); - emit_move_insn (ccv, old); + ccv = gen_rtx_REG (DImode, AR_CCV_REGNUM); + if (mode == DImode) + emit_move_insn (ccv, old); + else + { + rtx ccvtmp = gen_reg_rtx (DImode); + emit_insn (gen_zero_extendsidi2 (ccvtmp, old)); + emit_move_insn (ccv, ccvtmp); + } emit_insn (gen_mf ()); if (mode == SImode) insn = gen_cmpxchg_acq_si (tmp, mem, new, ccv); diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md index 51e3e287765..f1e4f87e237 100644 --- a/gcc/config/ia64/ia64.md +++ b/gcc/config/ia64/ia64.md @@ -5428,7 +5428,7 @@ (set (match_operand:SI 1 "not_postinc_memory_operand" "+S") (unspec:SI [(match_dup 1) (match_operand:SI 2 "gr_register_operand" "r") - (match_operand:SI 3 "ar_ccv_reg_operand" "")] + (match_operand 3 "ar_ccv_reg_operand" "")] UNSPEC_CMPXCHG_ACQ))] "" "cmpxchg4.acq %0 = %1, %2, %3" |