Imported from mainline FSF repositories

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@94600 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 33 insertions, 0 deletions

diff --git a/gcc/config/i960/i960-modes.def b/gcc/config/i960/i960-modes.def
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+++ b/gcc/config/i960/i960-modes.def
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+/* Definitions of target machine for GNU compiler, for Intel 80960
+   Copyright (C) 2002 Free Software Foundation, Inc.
+   Contributed by Steven McGeady, Intel Corp.
+   Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
+   Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+/* long double */
+FLOAT_MODE (TF, 16, ieee_extended_intel_128_format);
+
+/* Add any extra modes needed to represent the condition code.
+
+   Also, signed and unsigned comparisons are distinguished, as
+   are operations which are compatible with chkbit insns.  */
+
+CC_MODE (CC_UNS);
+CC_MODE (CC_CHK);