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author | liuhongt <hongtao.liu@intel.com> | 2020-08-26 15:24:10 +0800 |
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committer | liuhongt <hongtao.liu@intel.com> | 2020-08-28 15:52:00 +0800 |
commit | 436ee9fec2751826bc48069d4dd320207fd9dfa4 (patch) | |
tree | 502bb3ea63c53e9d9ee65df241b8730e3bfb112b /gcc/config/i386 | |
parent | a41439a06901dfff7c01d2455cb881ff939b57b5 (diff) | |
download | gcc-436ee9fec2751826bc48069d4dd320207fd9dfa4.tar.gz |
Add expander for movp2hi and movp2qi.
2020-08-30 Uros Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/96744
* config/i386/i386-expand.c (split_double_mode): Also handle
E_P2HImode and E_P2QImode.
* config/i386/sse.md (MASK_DWI): New define_mode_iterator.
(mov<mode>): New expander for P2HI,P2QI.
(*mov<mode>_internal): New define_insn_and_split to split
movement of P2QI/P2HI to 2 movqi/movhi patterns after reload.
gcc/testsuite/ChangeLog:
* gcc.target/i386/double_mask_reg-1.c: New test.
Diffstat (limited to 'gcc/config/i386')
-rw-r--r-- | gcc/config/i386/i386-expand.c | 6 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 24 |
2 files changed, 30 insertions, 0 deletions
diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index f7756ddef0f..3ee332e6dc6 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -116,6 +116,12 @@ split_double_mode (machine_mode mode, rtx operands[], case E_DImode: half_mode = SImode; break; + case E_P2HImode: + half_mode = HImode; + break; + case E_P2QImode: + half_mode = QImode; + break; default: gcc_unreachable (); } diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 864ec99dda3..f0b2c357b5d 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -22978,6 +22978,30 @@ (V4DI "TARGET_AVX512VL") (V2DI "TARGET_AVX512VL") (V8SI "TARGET_AVX512VL") (V4SI "TARGET_AVX512VL")]) +(define_mode_iterator MASK_DWI [P2QI P2HI]) + +(define_expand "mov<mode>" + [(set (match_operand:MASK_DWI 0 "nonimmediate_operand") + (match_operand:MASK_DWI 1 "nonimmediate_operand"))] + "TARGET_AVX512VP2INTERSECT" +{ + if (MEM_P (operands[1]) && MEM_P (operands[2])) + operands[1] = force_reg (<MODE>mode, operands[1]); +}) + +(define_insn_and_split "*mov<mode>_internal" + [(set (match_operand:MASK_DWI 0 "nonimmediate_operand" "=k,o") + (match_operand:MASK_DWI 1 "nonimmediate_operand" "ko,k"))] + "TARGET_AVX512VP2INTERSECT + && !(MEM_P (operands[0]) && MEM_P (operands[1]))" + "#" + "&& reload_completed" + [(set (match_dup 0) (match_dup 1)) + (set (match_dup 2) (match_dup 3))] +{ + split_double_mode (<MODE>mode, &operands[0], 2, &operands[0], &operands[2]); +}) + (define_insn "avx512vp2intersect_2intersect<mode>" [(set (match_operand:P2QI 0 "register_operand" "=k") (unspec:P2QI |