* config/i386/i386.md (bswap<mode>2): Macroize expander from

	bswap{si,di}2 using SWI48 mode iterator.
	(*bswap<mode>2_movbe): Macroize insn from *bswap{si,di}_movbe using
	SWI48 mode iterator.  Set type attribute of bswap insn to bitmanip,
	set modrm attribute of bswap insn to 0 and remove length attribute.
	(*bswap<mode>2_1): Macroize insn from *bswap{si,di}_1 using SWI48 mode
	iterator.  Set type attribute to bitmanip, set modrm attribute to 0,
	set mode attribute to <MODE> and remove length attribute.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@158587 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 18 insertions, 47 deletions

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index ef2414da96a..eb0588d76f5 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -12366,18 +12366,12 @@
    (set_attr "type" "bitmanip")
    (set_attr "mode" "SI")])
 
-(define_expand "bswapdi2"
-  [(set (match_operand:DI 0 "register_operand" "")
-	(bswap:DI (match_operand:DI 1 "register_operand" "")))]
-  "TARGET_64BIT"
-  "")
-
-(define_expand "bswapsi2"
-  [(set (match_operand:SI 0 "register_operand" "")
-	(bswap:SI (match_operand:SI 1 "register_operand" "")))]
+(define_expand "bswap<mode>2"
+  [(set (match_operand:SWI48 0 "register_operand" "")
+	(bswap:SWI48 (match_operand:SWI48 1 "register_operand" "")))]
   ""
 {
-  if (!(TARGET_BSWAP || TARGET_MOVBE))
+  if (<MODE>mode == SImode && !(TARGET_BSWAP || TARGET_MOVBE))
     {
       rtx x = operands[0];
 
@@ -12389,52 +12383,29 @@
     }
 })
 
-(define_insn "*bswapdi_movbe"
-  [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,m")
-	(bswap:DI (match_operand:DI 1 "nonimmediate_operand" "0,m,r")))]
-  "TARGET_64BIT && TARGET_MOVBE
+(define_insn "*bswap<mode>2_movbe"
+  [(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,r,m")
+	(bswap:SWI48 (match_operand:SWI48 1 "nonimmediate_operand" "0,m,r")))]
+  "TARGET_MOVBE
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
   "@
     bswap\t%0
     movbe\t{%1, %0|%0, %1}
     movbe\t{%1, %0|%0, %1}"
-  [(set_attr "type" "*,imov,imov")
-   (set_attr "modrm" "*,1,1")
-   (set_attr "prefix_0f" "1")
-   (set_attr "prefix_extra" "*,1,1")
-   (set_attr "length" "3,*,*")
-   (set_attr "mode" "DI")])
-
-(define_insn "*bswapsi_movbe"
-  [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,m")
-	(bswap:SI (match_operand:SI 1 "nonimmediate_operand" "0,m,r")))]
-  "TARGET_MOVBE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
-  "@
-    bswap\t%0
-    movbe\t{%1, %0|%0, %1}
-    movbe\t{%1, %0|%0, %1}"
-  [(set_attr "type" "*,imov,imov")
-   (set_attr "modrm" "*,1,1")
-   (set_attr "prefix_0f" "1")
+  [(set_attr "type" "bitmanip,imov,imov")
+   (set_attr "modrm" "0,1,1")
+   (set_attr "prefix_0f" "*,1,1")
    (set_attr "prefix_extra" "*,1,1")
-   (set_attr "length" "2,*,*")
-   (set_attr "mode" "SI")])
-
-(define_insn "*bswapdi_1"
-  [(set (match_operand:DI 0 "register_operand" "=r")
-	(bswap:DI (match_operand:DI 1 "register_operand" "0")))]
-  "TARGET_64BIT"
-  "bswap\t%0"
-  [(set_attr "prefix_0f" "1")
-   (set_attr "length" "3")])
+   (set_attr "mode" "<MODE>")])
 
-(define_insn "*bswapsi_1"
-  [(set (match_operand:SI 0 "register_operand" "=r")
-	(bswap:SI (match_operand:SI 1 "register_operand" "0")))]
+(define_insn "*bswap<mode>2_1"
+  [(set (match_operand:SWI48 0 "register_operand" "=r")
+	(bswap:SWI48 (match_operand:SWI48 1 "register_operand" "0")))]
   "TARGET_BSWAP"
   "bswap\t%0"
-  [(set_attr "prefix_0f" "1")
-   (set_attr "length" "2")])
+  [(set_attr "type" "bitmanip")
+   (set_attr "modrm" "0")
+   (set_attr "mode" "<MODE>")])
 
 (define_insn "*bswaphi_lowpart_1"
   [(set (strict_low_part (match_operand:HI 0 "register_operand" "+Q,r"))