diff options
| author | vekumar <vekumar@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-03-05 12:33:09 +0000 |
|---|---|---|
| committer | vekumar <vekumar@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-03-05 12:33:09 +0000 |
| commit | 23638b620786342799ab140991dd0abdecedb303 (patch) | |
| tree | 4378a33161ab1fee33c7dbdcdb446ac42e2f5d05 /gcc/config/i386/znver1.md | |
| parent | 60ff5614ffc0a2b3373dfa10dfd68eb577c9eecd (diff) | |
| download | gcc-23638b620786342799ab140991dd0abdecedb303.tar.gz | |
2016-03-05 Venkataramanan Kumar <Venkataramanan.kumar@amd.com>
Fix sseimul type attribute.
* config/i386/znver1.md
(znver1_sseimul, znver1_sseimul_avx256, znver1_sseimul_load,
znver1_sseimul_avx256_load) : Fix the type attribute.
(znver1_sseimul_di,
znver1_sseimul_load_di): Fix type attribute, pipe usage and latency.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@234007 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/znver1.md')
| -rw-r--r-- | gcc/config/i386/znver1.md | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/gcc/config/i386/znver1.md b/gcc/config/i386/znver1.md index 3db3bed5bb7..1d28c056a15 100644 --- a/gcc/config/i386/znver1.md +++ b/gcc/config/i386/znver1.md @@ -913,44 +913,44 @@ (define_insn_reservation "znver1_sseimul" 3 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "TI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "none")))) "znver1-direct,znver1-fp0*3") (define_insn_reservation "znver1_sseimul_avx256" 4 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "OI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "none")))) "znver1-double,znver1-fp0*4") (define_insn_reservation "znver1_sseimul_load" 7 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "TI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "load")))) "znver1-direct,znver1-load,znver1-fp0*3") (define_insn_reservation "znver1_sseimul_avx256_load" 8 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "OI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "load")))) "znver1-double,znver1-load,znver1-fp0*4") -(define_insn_reservation "znver1_sseimul_di" 4 +(define_insn_reservation "znver1_sseimul_di" 3 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "DI") (and (eq_attr "memory" "none") - (eq_attr "type" "ssemul")))) - "znver1-direct,znver1-fp0*4") + (eq_attr "type" "sseimul")))) + "znver1-direct,znver1-fp0*3") -(define_insn_reservation "znver1_sseimul_load_di" 8 +(define_insn_reservation "znver1_sseimul_load_di" 7 (and (eq_attr "cpu" "znver1") (and (eq_attr "mode" "DI") - (and (eq_attr "type" "ssemul") + (and (eq_attr "type" "sseimul") (eq_attr "memory" "load")))) - "znver1-direct,znver1-load,znver1-fp0*4") + "znver1-direct,znver1-load,znver1-fp0*3") ;; SSE compares (define_insn_reservation "znver1_sse_cmp" 1 |