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author | hubicka <hubicka@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-02-22 02:09:06 +0000 |
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committer | hubicka <hubicka@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-02-22 02:09:06 +0000 |
commit | 1f27494a5017caf54e66631f42c532e20670fca3 (patch) | |
tree | c74c0b1a2b314570d121c6928bed7609ac436b20 /gcc/config/i386/xmmintrin.h | |
parent | b28bedce63a717bfc8bcf48f33683e052f73d58d (diff) | |
download | gcc-1f27494a5017caf54e66631f42c532e20670fca3.tar.gz |
* i386.c (def_builtin): Special case 64bit builtins.
(MASK_SSE164, MASK_SSE264): New constants.
(builtin_description): Add 64bit builtins.
(ix86_init_mmx_sse_builtins): Likewise.
* i386.h (enum ix86_builtins): Likewise.
* i386.md (cvtss2siq, cvttss2siq, cvtsd2siq, cvttsd2siq, cvtsi2sdq,
sse2_movq2dq_rex64, sse2_movsq2q_rex64): New.
(sse2_movq2dq, sse2_movsq2q): Disable for 64bit.
* mmintrin.h (_mm_cvtsi64x_si64, _mm_set_pi64x, _mm_cvtsi64_si64x): New.
* xmmintrin.h (_mm_cvtss_si64x, _mm_cvttss_si64x, _mm_cvtsi64x_ss,
_mm_set_epi64x, _mm_set1_epi64x, _mm_cvtsd_si64x, _mm_cvttsd_si64x,
_mm_cvtsi64x_sd, _mm_cvtsi64x_si128, _mm_cvtsi128_si64x): New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@63267 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/xmmintrin.h')
-rw-r--r-- | gcc/config/i386/xmmintrin.h | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/gcc/config/i386/xmmintrin.h b/gcc/config/i386/xmmintrin.h index 1e07ec67239..48004f615a7 100644 --- a/gcc/config/i386/xmmintrin.h +++ b/gcc/config/i386/xmmintrin.h @@ -475,6 +475,16 @@ _mm_cvtss_si32 (__m128 __A) return __builtin_ia32_cvtss2si ((__v4sf) __A); } +#ifdef __x86_64__ +/* Convert the lower SPFP value to a 32-bit integer according to the current + rounding mode. */ +static __inline long long +_mm_cvtss_si64x (__m128 __A) +{ + return __builtin_ia32_cvtss2si64 ((__v4sf) __A); +} +#endif + /* Convert the two lower SPFP values to 32-bit integers according to the current rounding mode. Return the integers in packed form. */ static __inline __m64 @@ -490,6 +500,15 @@ _mm_cvttss_si32 (__m128 __A) return __builtin_ia32_cvttss2si ((__v4sf) __A); } +#ifdef __x86_64__ +/* Truncate the lower SPFP value to a 32-bit integer. */ +static __inline long long +_mm_cvttss_si64x (__m128 __A) +{ + return __builtin_ia32_cvttss2si64 ((__v4sf) __A); +} +#endif + /* Truncate the two lower SPFP values to 32-bit integers. Return the integers in packed form. */ static __inline __m64 @@ -505,6 +524,15 @@ _mm_cvtsi32_ss (__m128 __A, int __B) return (__m128) __builtin_ia32_cvtsi2ss ((__v4sf) __A, __B); } +#ifdef __x86_64__ +/* Convert B to a SPFP value and insert it as element zero in A. */ +static __inline __m128 +_mm_cvtsi64x_ss (__m128 __A, long long __B) +{ + return (__m128) __builtin_ia32_cvtsi642ss ((__v4sf) __A, __B); +} +#endif + /* Convert the two 32-bit values in B to SPFP form and insert them as the two lower elements in A. */ static __inline __m128 @@ -1662,6 +1690,24 @@ _mm_set_epi32 (int __Z, int __Y, int __X, int __W) return __u.__v; } + +#ifdef __x86_64__ +/* Create the vector [Z Y]. */ +static __inline __m128i +_mm_set_epi64x (long long __Z, long long __Y) +{ + union { + long __a[2]; + __m128i __v; + } __u; + + __u.__a[0] = __Y; + __u.__a[1] = __Z; + + return __u.__v; +} +#endif + /* Create the vector [S T U V Z Y X W]. */ static __inline __m128i _mm_set_epi16 (short __Z, short __Y, short __X, short __W, @@ -1730,6 +1776,15 @@ _mm_set1_epi32 (int __A) return (__m128i) __builtin_ia32_pshufd ((__v4si)__tmp, _MM_SHUFFLE (0,0,0,0)); } +#ifdef __x86_64__ +static __inline __m128i +_mm_set1_epi64x (long long __A) +{ + __v2di __tmp = (__v2di)__builtin_ia32_movq2dq ((unsigned long long)__A); + return (__m128i) __builtin_ia32_shufpd ((__v2df)__tmp, (__v2df)__tmp, _MM_SHUFFLE2 (0,0)); +} +#endif + static __inline __m128i _mm_set1_epi16 (short __A) { @@ -1899,12 +1954,28 @@ _mm_cvtsd_si32 (__m128d __A) return __builtin_ia32_cvtsd2si ((__v2df) __A); } +#ifdef __x86_64__ +static __inline long long +_mm_cvtsd_si64x (__m128d __A) +{ + return __builtin_ia32_cvtsd2si64 ((__v2df) __A); +} +#endif + static __inline int _mm_cvttsd_si32 (__m128d __A) { return __builtin_ia32_cvttsd2si ((__v2df) __A); } +#ifdef __x86_64__ +static __inline long long +_mm_cvttsd_si64x (__m128d __A) +{ + return __builtin_ia32_cvttsd2si64 ((__v2df) __A); +} +#endif + static __inline __m128 _mm_cvtsd_ss (__m128 __A, __m128d __B) { @@ -1917,6 +1988,14 @@ _mm_cvtsi32_sd (__m128d __A, int __B) return (__m128d)__builtin_ia32_cvtsi2sd ((__v2df) __A, __B); } +#ifdef __x86_64__ +static __inline __m128d +_mm_cvtsi64x_sd (__m128d __A, long long __B) +{ + return (__m128d)__builtin_ia32_cvtsi642sd ((__v2df) __A, __B); +} +#endif + static __inline __m128d _mm_cvtss_sd (__m128d __A, __m128 __B) { @@ -2465,6 +2544,14 @@ _mm_cvtsi32_si128 (int __A) return (__m128i) __builtin_ia32_loadd (&__A); } +#ifdef __x86_64__ +static __inline __m128i +_mm_cvtsi64x_si128 (long long __A) +{ + return (__m128i) __builtin_ia32_movq2dq (__A); +} +#endif + static __inline int _mm_cvtsi128_si32 (__m128i __A) { @@ -2473,6 +2560,14 @@ _mm_cvtsi128_si32 (__m128i __A) return __tmp; } +#ifdef __x86_64__ +static __inline long long +_mm_cvtsi128_si64x (__m128i __A) +{ + return __builtin_ia32_movdq2q ((__v2di)__A); +} +#endif + #endif /* __SSE2__ */ #endif /* __SSE__ */ |