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authortmsriram <tmsriram@138bc75d-0d04-0410-961f-82ee72b054a4>2013-06-23 06:15:19 +0000
committertmsriram <tmsriram@138bc75d-0d04-0410-961f-82ee72b054a4>2013-06-23 06:15:19 +0000
commitef21d40e1ef4c72997688d5716a6f4ef5a72b499 (patch)
treebcbdec95b4f436d90004456b20b84ef68cf1e7c8 /gcc/config/i386/smmintrin.h
parent60777f693d3ac0ad238b9c009f6d094d2a550d24 (diff)
downloadgcc-ef21d40e1ef4c72997688d5716a6f4ef5a72b499.tar.gz
Allow mmintrin headers to work with function specific target opts. Please
see discussion here: http://gcc.gnu.org/ml/gcc-patches/2013-04/msg00740.html * config/i386/i386.c (ix86_pragma_target_parse): Restore target when current target options does not apply. * config/i386/i386-protos.h (ix86_reset_previous_fndecl): New function. * config/i386/i386.c (ix86_reset_previous_fndecl): Ditto. * config/i386/bmiintrin.h: Pass appropriate target attributes to header. * config/i386/mmintrin.h: Ditto. * config/i386/nmmintrin.h: Ditto. * config/i386/avx2intrin.h: Ditto. * config/i386/fxsrintrin.h: Ditto. * config/i386/tbmintrin.h: Ditto. * config/i386/xsaveintrin.h: Ditto. * config/i386/f16cintrin.h: Ditto. * config/i386/xtestintrin.h: Ditto. * config/i386/xsaveoptintrin.h: Ditto. * config/i386/bmi2intrin.h: Ditto. * config/i386/lzcntintrin.h: Ditto. * config/i386/smmintrin.h: Ditto. * config/i386/wmmintrin.h: Ditto. * config/i386/x86intrin.h: Remove all header include guards. * config/i386/prfchwintrin.h: Ditto. * config/i386/pmmintrin.h: Ditto. * config/i386/tmmintrin.h: Ditto. * config/i386/xmmintrin.h: Ditto. * config/i386/popcntintrin.h: Ditto. * config/i386/rdseedintrin.h: Ditto. * config/i386/ammintrin.h: Ditto. * config/i386/emmintrin.h: Ditto. * config/i386/immintrin.h: Remove all header include guards. * config/i386/fma4intrin.h: Ditto. * config/i386/lwpintrin.h: Ditto. * config/i386/xopintrin.h: Ditto. * config/i386/ia32intrin.h: Ditto. * config/i386/avxintrin.h: Ditto. * config/i386/rtmintrin.h: Ditto. * config/i386/fmaintrin.h: Ditto. * config/i386/mm3dnow.h: Ditto. * testsuite/gcc.target/i386/intrinsics_1.c: New test. * testsuite/gcc.target/i386/intrinsics_2.c: Ditto. * testsuite/gcc.target/i386/intrinsics_3.c: Ditto. * testsuite/gcc.target/i386/intrinsics_4.c: Ditto. * testsuite/gcc.target/i386/intrinsics_5.c: Ditto. * testsuite/gcc.target/i386/intrinsics_6.c: Ditto. * testsuite/gcc.target/i386/avx-1.c: Provide macros for builtins needing immediate arguments in f16cintrin.h and rtmintrin.h. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200349 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/smmintrin.h')
-rw-r--r--gcc/config/i386/smmintrin.h50
1 files changed, 41 insertions, 9 deletions
diff --git a/gcc/config/i386/smmintrin.h b/gcc/config/i386/smmintrin.h
index 3ae916ce5d3..20fa2ca2f94 100644
--- a/gcc/config/i386/smmintrin.h
+++ b/gcc/config/i386/smmintrin.h
@@ -27,14 +27,16 @@
#ifndef _SMMINTRIN_H_INCLUDED
#define _SMMINTRIN_H_INCLUDED
-#ifndef __SSE4_1__
-# error "SSE4.1 instruction set not enabled"
-#else
-
/* We need definitions from the SSSE3, SSE3, SSE2 and SSE header
files. */
#include <tmmintrin.h>
+#ifndef __SSE4_1__
+#pragma GCC push_options
+#pragma GCC target("sse4.1")
+#define __DISABLE_SSE4_1__
+#endif /* __SSE4_1__ */
+
/* Rounding mode macros. */
#define _MM_FROUND_TO_NEAREST_INT 0x00
#define _MM_FROUND_TO_NEG_INF 0x01
@@ -582,7 +584,11 @@ _mm_stream_load_si128 (__m128i *__X)
return (__m128i) __builtin_ia32_movntdqa ((__v2di *) __X);
}
-#ifdef __SSE4_2__
+#ifndef __SSE4_2__
+#pragma GCC push_options
+#pragma GCC target("sse4.2")
+#define __DISABLE_SSE4_2__
+#endif /* __SSE4_2__ */
/* These macros specify the source data format. */
#define _SIDD_UBYTE_OPS 0x00
@@ -792,9 +798,29 @@ _mm_cmpgt_epi64 (__m128i __X, __m128i __Y)
return (__m128i) __builtin_ia32_pcmpgtq ((__v2di)__X, (__v2di)__Y);
}
-#ifdef __POPCNT__
+#ifdef __DISABLE_SSE4_2__
+#undef __DISABLE_SSE4_2__
+#pragma GCC pop_options
+#endif /* __DISABLE_SSE4_2__ */
+
+#ifdef __DISABLE_SSE4_1__
+#undef __DISABLE_SSE4_1__
+#pragma GCC pop_options
+#endif /* __DISABLE_SSE4_1__ */
+
#include <popcntintrin.h>
-#endif
+
+#ifndef __SSE4_1__
+#pragma GCC push_options
+#pragma GCC target("sse4.1")
+#define __DISABLE_SSE4_1__
+#endif /* __SSE4_1__ */
+
+#ifndef __SSE4_2__
+#pragma GCC push_options
+#pragma GCC target("sse4.2")
+#define __DISABLE_SSE4_2__
+#endif /* __SSE4_1__ */
/* Accumulate CRC32 (polynomial 0x11EDC6F41) value. */
extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
@@ -823,8 +849,14 @@ _mm_crc32_u64 (unsigned long long __C, unsigned long long __V)
}
#endif
-#endif /* __SSE4_2__ */
+#ifdef __DISABLE_SSE4_2__
+#undef __DISABLE_SSE4_2__
+#pragma GCC pop_options
+#endif /* __DISABLE_SSE4_2__ */
-#endif /* __SSE4_1__ */
+#ifdef __DISABLE_SSE4_1__
+#undef __DISABLE_SSE4_1__
+#pragma GCC pop_options
+#endif /* __DISABLE_SSE4_1__ */
#endif /* _SMMINTRIN_H_INCLUDED */