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authorH.J. Lu <hjl.tools@gmail.com>2015-12-19 06:51:44 -0800
committerH.J. Lu <hjl.tools@gmail.com>2016-02-12 05:08:29 -0800
commitba5e18d8d98a3beb3d51da03f4721f5576fcb997 (patch)
tree683731b55aaa500b3a601a274cd7f6bf37da0dfd /gcc/config/i386/predicates.md
parentcea7085941f85780f1b32c3a218f2009f2f44ab2 (diff)
downloadgcc-hjl/pr68991/gcc-5-branch.tar.gz
Add vector_memory_operand and "Bm" constrainthjl/pr68991/gcc-5-branch
SSE vector arithmetic and logic instructions only accept aligned memory operand. This patch adds vector_memory_operand and "Bm" constraint for aligned SSE memory operand. They are applied to SSE plusminus and any_logic patterns. gcc/ PR target/68991 * config/i386/constraints.md (Bm): New constraint. * config/i386/predicates.md (vector_memory_operand): New predicate. * config/i386/sse.md: Replace xm with xBm in plusminus and any_logic patterns. gcc/testsuite/ PR target/68991 * g++.dg/pr68991-1.C: New test. * g++.dg/pr68991-2.C: Likewise.
Diffstat (limited to 'gcc/config/i386/predicates.md')
-rw-r--r--gcc/config/i386/predicates.md7
1 files changed, 7 insertions, 0 deletions
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index f0c999cb182..b47aca0df64 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -937,6 +937,13 @@
return false;
})
+; Return true when OP is operand acceptable for vector memory operand.
+; Only AVX can have misaligned memory operand.
+(define_predicate "vector_memory_operand"
+ (and (match_operand 0 "memory_operand")
+ (ior (match_test "TARGET_AVX")
+ (match_test "MEM_ALIGN (op) >= GET_MODE_ALIGNMENT (mode)"))))
+
; Return true when OP is operand acceptable for standard SSE move.
(define_predicate "vector_move_operand"
(ior (match_operand 0 "nonimmediate_operand")