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| author | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-09-09 15:57:43 +0000 |
|---|---|---|
| committer | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-09-09 15:57:43 +0000 |
| commit | eacbf1cd3aff3dbf47a71dc7fdb1d01dce8e777e (patch) | |
| tree | 1bfb594134ffebca206d3ed2fe55693634759c1d /gcc/config/i386/mmx.md | |
| parent | 11fd42e7594bdb9c8d9cf10f9924cb8644752b78 (diff) | |
| download | gcc-eacbf1cd3aff3dbf47a71dc7fdb1d01dce8e777e.tar.gz | |
2013-09-09 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk rev 202389 using svnmerge.py; notice
that gcc/melt/xtramelt-ana-base.melt has been significantly
updated, but some updates are yet missing...
[gcc/]
2013-09-09 Basile Starynkevitch <basile@starynkevitch.net>
{{When merging trunk GCC 4.9 with C++ passes}}
* melt/xtramelt-ana-base.melt: Add GCC 4.9 specific code, still
incomplete, for classy passes.... Only Gimple passes are yet possible...
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@202408 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/mmx.md')
| -rw-r--r-- | gcc/config/i386/mmx.md | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 12c062687c0..17e24999258 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -78,9 +78,9 @@ (define_insn "*mov<mode>_internal" [(set (match_operand:MMXMODE 0 "nonimmediate_operand" - "=r ,o ,r,r ,m ,?!y,!y,?!y,m ,r ,?!Ym,x,x,x,m,*x,*x,*x,m ,r ,Yi,!Ym,*Yi") + "=r ,o ,r,r ,m ,?!y,!y,?!y,m ,r ,?!Ym,v,v,v,m,*x,*x,*x,m ,r ,Yi,!Ym,*Yi") (match_operand:MMXMODE 1 "vector_move_operand" - "rCo,rC,C,rm,rC,C ,!y,m ,?!y,?!Yn,r ,C,x,m,x,C ,*x,m ,*x,Yj,r ,*Yj,!Yn"))] + "rCo,rC,C,rm,rC,C ,!y,m ,?!y,?!Yn,r ,C,v,m,v,C ,*x,m ,*x,Yj,r ,*Yj,!Yn"))] "TARGET_MMX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" { @@ -128,6 +128,9 @@ case MODE_TI: return "%vmovdqa\t{%1, %0|%0, %1}"; + case MODE_XI: + return "vmovdqa64\t{%g1, %g0|%g0, %g1}"; + case MODE_V2SF: if (TARGET_AVX && REG_P (operands[0])) return "vmovlps\t{%1, %0, %0|%0, %0, %1}"; @@ -182,7 +185,10 @@ (cond [(eq_attr "alternative" "2") (const_string "SI") (eq_attr "alternative" "11,12,15,16") - (cond [(match_test "<MODE>mode == V2SFmode") + (cond [(ior (match_operand 0 "ext_sse_reg_operand") + (match_operand 1 "ext_sse_reg_operand")) + (const_string "XI") + (match_test "<MODE>mode == V2SFmode") (const_string "V4SF") (ior (not (match_test "TARGET_SSE2")) (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")) |