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authorHarsha Jagasia <harsha.jagasia@amd.com>2009-11-04 21:15:42 +0000
committerDwarakanath Rajagopal <dwarak@gcc.gnu.org>2009-11-04 21:15:42 +0000
commit3e901069e7501dad4d7de5500d90835e7f6c217d (patch)
tree6735bfdcfc869ec764d7d7c03c6243158a7f9fbf /gcc/config/i386/lwpintrin.h
parent6168891d1f70ad7e962dbe9cbeac6944e9473d97 (diff)
downloadgcc-3e901069e7501dad4d7de5500d90835e7f6c217d.tar.gz
invoke.texi (-mlwp): Add documentation.
2009-11-04 Harsha Jagasia <harsha.jagasia@amd.com> Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> * doc/invoke.texi (-mlwp): Add documentation. * doc/extend.texi (x86 intrinsics): Add LWP intrinsics. * config.gcc (i[34567]86-*-*): Include lwpintrin.h. (x86_64-*-*): Ditto. * config/i386/lwpintrin.h: New file, provide x86 compiler intrinisics for LWP. * config/i386/cpuid.h (bit_LWP): Define LWP bit. * config/i386/x86intrin.h: Add LWP check and lwpintrin.h. * config/i386/i386-c.c (ix86_target_macros_internal): Check ISA_FLAG for LWP. * config/i386/i386.h (TARGET_LWP): New macro for LWP. * config/i386/i386.opt (-mlwp): New switch for LWP support. * config/i386/i386.c (OPTION_MASK_ISA_LWP_SET): New. (OPTION_MASK_ISA_LWP_UNSET): New. (ix86_handle_option): Handle -mlwp. (isa_opts): Handle -mlwp. (enum pta_flags): Add PTA_LWP. (override_options): Add LWP support. (IX86_BUILTIN_LLWPCB16): New for LWP intrinsic. (IX86_BUILTIN_LLWPCB32): Ditto. (IX86_BUILTIN_LLWPCB64): Ditto. (IX86_BUILTIN_SLWPCB16): Ditto. (IX86_BUILTIN_SLWPCB32): Ditto. (IX86_BUILTIN_SLWPCB64): Ditto. (IX86_BUILTIN_LWPVAL16): Ditto. (IX86_BUILTIN_LWPVAL32): Ditto. (IX86_BUILTIN_LWPVAL64): Ditto. (IX86_BUILTIN_LWPINS16): Ditto. (IX86_BUILTIN_LWPINS32): Ditto. (IX86_BUILTIN_LWPINS64): Ditto. (enum ix86_special_builtin_type): Add LWP intrinsic support. (builtin_description): Ditto. (ix86_init_mmx_sse_builtins): Ditto. (ix86_expand_special_args_builtin): Ditto. * config/i386/i386.md (UNSPEC_LLWP_INTRINSIC): Add new UNSPEC for LWP support. (UNSPEC_SLWP_INTRINSIC): Ditto. (UNSPECV_LWPVAL_INTRINSIC): Ditto. (UNSPECV_LWPINS_INTRINSIC): Ditto. (lwp_llwpcbhi1): New lwp pattern. (lwp_llwpcbsi1): Ditto. (lwp_llwpcbdi1): Ditto. (lwp_slwpcbhi1): Ditto. (lwp_slwpcbsi1): Ditto. (lwp_slwpcbdi1): Ditto. (lwp_lwpvalhi3): Ditto. (lwp_lwpvalsi3): Ditto. (lwp_lwpvaldi3): Ditto. (lwp_lwpinshi3): Ditto. (lwp_lwpinssi3): Ditto. (lwp_lwpinsdi3): Ditto. Co-Authored-By: Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> From-SVN: r153917
Diffstat (limited to 'gcc/config/i386/lwpintrin.h')
-rw-r--r--gcc/config/i386/lwpintrin.h109
1 files changed, 109 insertions, 0 deletions
diff --git a/gcc/config/i386/lwpintrin.h b/gcc/config/i386/lwpintrin.h
new file mode 100644
index 00000000000..e5137ec24f4
--- /dev/null
+++ b/gcc/config/i386/lwpintrin.h
@@ -0,0 +1,109 @@
+/* Copyright (C) 2007, 2008, 2009 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3, or (at your option)
+ any later version.
+
+ GCC is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ Under Section 7 of GPL version 3, you are granted additional
+ permissions described in the GCC Runtime Library Exception, version
+ 3.1, as published by the Free Software Foundation.
+
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+ <http://www.gnu.org/licenses/>. */
+
+#ifndef _X86INTRIN_H_INCLUDED
+# error "Never use <lwpintrin.h> directly; include <x86intrin.h> instead."
+#endif
+
+#ifndef _LWPINTRIN_H_INCLUDED
+#define _LWPINTRIN_H_INCLUDED
+
+#ifndef __LWP__
+# error "LWP instruction set not enabled"
+#else
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__llwpcb16 (void *pcbAddress)
+{
+ __builtin_ia32_llwpcb16 (pcbAddress);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__llwpcb32 (void *pcbAddress)
+{
+ __builtin_ia32_llwpcb32 (pcbAddress);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__llwpcb64 (void *pcbAddress)
+{
+ __builtin_ia32_llwpcb64 (pcbAddress);
+}
+
+extern __inline void * __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__slwpcb16 (void)
+{
+ return __builtin_ia32_slwpcb16 ();
+}
+
+extern __inline void * __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__slwpcb32 (void)
+{
+ return __builtin_ia32_slwpcb32 ();
+}
+
+extern __inline void * __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__slwpcb64 (void)
+{
+ return __builtin_ia32_slwpcb64 ();
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpval16 (unsigned short data2, unsigned int data1, unsigned short flags)
+{
+ __builtin_ia32_lwpval16 (data2, data1, flags);
+}
+/*
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpval32 (unsigned int data2, unsigned int data1, unsigned int flags)
+{
+ __builtin_ia32_lwpval32 (data2, data1, flags);
+}
+
+extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpval64 (unsigned __int64 data2, unsigned int data1, unsigned int flags)
+{
+ __builtin_ia32_lwpval64 (data2, data1, flags);
+}
+
+extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpins16 (unsigned short data2, unsigned int data1, unsigned short flags)
+{
+ return __builtin_ia32_lwpins16 (data2, data1, flags);
+}
+
+extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpins32 (unsigned int data2, unsigned int data1, unsigned int flags)
+{
+ return __builtin_ia32_lwpins32 (data2, data1, flags);
+}
+
+extern __inline unsigned char __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__lwpins64 (unsigned __int64 data2, unsigned int data1, unsigned int flags)
+{
+ return __builtin_ia32_lwpins64 (data2, data1, flags);
+}
+*/
+#endif /* __LWP__ */
+
+#endif /* _LWPINTRIN_H_INCLUDED */