diff options
author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-04-01 22:45:25 +0000 |
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committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-04-01 22:45:25 +0000 |
commit | 8a13ea0ab162e9bd76e1c028db39503eb7b4a946 (patch) | |
tree | 8d8e835d84592ae3d9df9802e5e148ab5e48b776 /gcc/config/i386/i386.md | |
parent | c4b03c0f0a55d6a496272b886af7f0b7b37ba640 (diff) | |
download | gcc-8a13ea0ab162e9bd76e1c028db39503eb7b4a946.tar.gz |
PR target/14702
* config/i386/i386.md: fix source operand constraints in
mmx_pshufw, sse2_pshufd, sse2_pshuflw, sse2_pshufhw
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@80330 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/i386.md')
-rw-r--r-- | gcc/config/i386/i386.md | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 4906d35b7d0..47482a97a63 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -20624,7 +20624,7 @@ (define_insn "mmx_pshufw" [(set (match_operand:V4HI 0 "register_operand" "=y") - (unspec:V4HI [(match_operand:V4HI 1 "register_operand" "0") + (unspec:V4HI [(match_operand:V4HI 1 "nonimmediate_operand" "ym") (match_operand:SI 2 "immediate_operand" "i")] UNSPEC_SHUFFLE))] "TARGET_SSE || TARGET_3DNOW_A" @@ -22321,7 +22321,7 @@ (define_insn "sse2_pshufd" [(set (match_operand:V4SI 0 "register_operand" "=x") - (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0") + (unspec:V4SI [(match_operand:V4SI 1 "nonimmediate_operand" "xm") (match_operand:SI 2 "immediate_operand" "i")] UNSPEC_SHUFFLE))] "TARGET_SSE2" @@ -22331,7 +22331,7 @@ (define_insn "sse2_pshuflw" [(set (match_operand:V8HI 0 "register_operand" "=x") - (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "0") + (unspec:V8HI [(match_operand:V8HI 1 "nonimmediate_operand" "xm") (match_operand:SI 2 "immediate_operand" "i")] UNSPEC_PSHUFLW))] "TARGET_SSE2" @@ -22341,7 +22341,7 @@ (define_insn "sse2_pshufhw" [(set (match_operand:V8HI 0 "register_operand" "=x") - (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "0") + (unspec:V8HI [(match_operand:V8HI 1 "nonimmediate_operand" "xm") (match_operand:SI 2 "immediate_operand" "i")] UNSPEC_PSHUFHW))] "TARGET_SSE2" |