diff options
| author | Uros Bizjak <ubizjak@gmail.com> | 2007-08-23 16:23:40 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2007-08-23 16:23:40 +0200 |
| commit | 1406ee9086b171a7189fe0c9758727ca5c8c5fe4 (patch) | |
| tree | 9f9f17da59f58dce8b45052dae9dfe07e200a1c8 /gcc/config/i386/i386.c | |
| parent | 9f7b7ba4c4087874da78ad591eaf13fa99ee1c31 (diff) | |
| download | gcc-1406ee9086b171a7189fe0c9758727ca5c8c5fe4.tar.gz | |
re PR target/17390 (missing floating point compare optimization)
PR target/17390
* config/i386/i386.c (ix86_expand_fp_compare): Expand fp comparison to
fake fcomi i387 instruction for !TARGET_CMOVE.
(ix86_expand_branch): Expand natural sequence with one jump for
all targets, not only TARGET_CMOVE.
* config/i386/i386.md (*cmpfp_0_cc): New define_insn_and_split
pattern to implement fake fcomi sequence. Split instruction after
reload to correct compare sequences.
(*cmpfp_xf_cc): Ditto.
(*cmpfp_<mode>_cc): Ditto.
(*cmpfp_u_cc): Ditto.
(*cmpfp_<mode>_cc): Ditto.
testsuite/ChangeLog:
PR target/17390
* gcc.target/i386/pr17390.c: New test.
From-SVN: r127742
Diffstat (limited to 'gcc/config/i386/i386.c')
| -rw-r--r-- | gcc/config/i386/i386.c | 27 |
1 files changed, 12 insertions, 15 deletions
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 851d0a0032f..c474f017d97 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -11471,26 +11471,24 @@ ix86_expand_fp_compare (enum rtx_code code, rtx op0, rtx op1, rtx scratch, ix86_fp_comparison_codes (code, &bypass_code, &first_code, &second_code); /* Do fcomi/sahf based test when profitable. */ - if ((TARGET_CMOVE || TARGET_SAHF) + if (ix86_fp_comparison_arithmetics_cost (code) > cost && (bypass_code == UNKNOWN || bypass_test) - && (second_code == UNKNOWN || second_test) - && ix86_fp_comparison_arithmetics_cost (code) > cost) + && (second_code == UNKNOWN || second_test)) { + tmp = gen_rtx_COMPARE (fpcmp_mode, op0, op1); + tmp = gen_rtx_SET (VOIDmode, gen_rtx_REG (fpcmp_mode, FLAGS_REG), + tmp); if (TARGET_CMOVE) - { - tmp = gen_rtx_COMPARE (fpcmp_mode, op0, op1); - tmp = gen_rtx_SET (VOIDmode, gen_rtx_REG (fpcmp_mode, FLAGS_REG), - tmp); - emit_insn (tmp); - } + emit_insn (tmp); else { - tmp = gen_rtx_COMPARE (fpcmp_mode, op0, op1); - tmp2 = gen_rtx_UNSPEC (HImode, gen_rtvec (1, tmp), UNSPEC_FNSTSW); + gcc_assert (TARGET_SAHF); + if (!scratch) scratch = gen_reg_rtx (HImode); - emit_insn (gen_rtx_SET (VOIDmode, scratch, tmp2)); - emit_insn (gen_x86_sahf_1 (scratch)); + tmp2 = gen_rtx_CLOBBER (VOIDmode, scratch); + + emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, tmp, tmp2))); } /* The FP codes work out to act like unsigned. */ @@ -11717,8 +11715,7 @@ ix86_expand_branch (enum rtx_code code, rtx label) /* Check whether we will use the natural sequence with one jump. If so, we can expand jump early. Otherwise delay expansion by creating compound insn to not confuse optimizers. */ - if (bypass_code == UNKNOWN && second_code == UNKNOWN - && TARGET_CMOVE) + if (bypass_code == UNKNOWN && second_code == UNKNOWN) { ix86_split_fp_branch (code, ix86_compare_op0, ix86_compare_op1, gen_rtx_LABEL_REF (VOIDmode, label), |