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| author | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-08-25 17:05:34 +0000 |
|---|---|---|
| committer | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-08-25 17:05:34 +0000 |
| commit | f30b3ad60f88e4644112144dc17636d3d6a953dc (patch) | |
| tree | 2c867549710477ec586e5824aef0b170a9471c25 /gcc/config/i386/constraints.md | |
| parent | 7dce33fee0387025b6ed6cae4d71f1f72bc9c0be (diff) | |
| download | gcc-f30b3ad60f88e4644112144dc17636d3d6a953dc.tar.gz | |
* config/i386/i386.md (isa): Add sse2, sse2_noavx, sse3,
sse4 and sse4_noavx.
(enabled): Handle sse2, sse2_noavx, sse3, sse4 and sse4_noavx.
(*pushdf_rex64): Change Y2 register constraint to x.
(*movdf_internal_rex64): Ditto.
(*zero_extendsidi2_rex64): Ditto.
(*movdi_internal): Change Y2 register constraint to x
and update "isa" attribute.
(*pushdf): Ditto.
(*movdf internal): Ditto.
(zero_extendsidi2_1): Ditto.
(*truncdfdf_mixed): Ditto.
(*truncxfdf2_mixed): Ditto.
* config/i386/mmx.md (*mov<mode>_internal_rex64): Change Y2
register constraint to x.
(*movv2sf_internal_rex64): Ditto.
(*mov<mode>_internal): Change Y2 register constraint to x
and add "isa" attribute.
(*movv2sf_internal): Ditto.
(*vec_extractv2si_1): Ditto.
* config/i386/sse.md ("vec_set<mode>_0): Change Y2 and Y4 register
constraints to x and update "isa" attribute.
(*vec_interleave_highv2df): Change Y3 registerconstraint
to x and update "isa" attribute.
(*vec_interleave_lowv2df): Ditto.
(*vec_concatv2df): Change Y2 register constraint to x and
update "isa" attribute.
(sse2_loadld): Ditto.
(*vec_extractv2di_1): Ditto.
(*vec_dupv4si): Ditto.
(*vec_dupv2di): Ditto.
(*vec_concatv4si): Ditto.
(vec_concatv2di): Ditto.
* config/i386/constraints.md (Y2): Remove.
(Y3): Ditto.
(Y4): Ditto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@178073 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/constraints.md')
| -rw-r--r-- | gcc/config/i386/constraints.md | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index 09ee66efaf4..e0b28622d17 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -87,9 +87,6 @@ ;; We use the Y prefix to denote any number of conditional register sets: ;; z First SSE register. -;; 2 SSE2 enabled -;; 3 SSE3 enabled -;; 4 SSE4_1 enabled ;; i SSE2 inter-unit moves enabled ;; m MMX inter-unit moves enabled ;; p Integer register when TARGET_PARTIAL_REG_STALL is disabled @@ -99,15 +96,6 @@ (define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS" "First SSE register (@code{%xmm0}).") -(define_register_constraint "Y2" "TARGET_SSE2 ? SSE_REGS : NO_REGS" - "@internal Any SSE register, when SSE2 is enabled.") - -(define_register_constraint "Y3" "TARGET_SSE3 ? SSE_REGS : NO_REGS" - "@internal Any SSE register, when SSE3 is enabled.") - -(define_register_constraint "Y4" "TARGET_SSE4_1 ? SSE_REGS : NO_REGS" - "@internal Any SSE register, when SSE4_1 is enabled.") - (define_register_constraint "Yi" "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS" "@internal Any SSE register, when SSE2 and inter-unit moves are enabled.") |