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authorhp <hp@138bc75d-0d04-0410-961f-82ee72b054a4>2008-04-13 00:51:51 +0000
committerhp <hp@138bc75d-0d04-0410-961f-82ee72b054a4>2008-04-13 00:51:51 +0000
commit8c6db08a16f55fbaace8c817e9c8bd339f04b834 (patch)
tree6fe5df6d85db378bce71b2007436862b97929077 /gcc/config/cris
parent095cccfaf387fda8d7c95a299067f5c1ebe36b4d (diff)
downloadgcc-8c6db08a16f55fbaace8c817e9c8bd339f04b834.tar.gz
* config/cris/cris.md ("*andhi_lowpart_non_v32", "*andhi_lowpart_v32")
("*andqi_lowpart_non_v32", "*andqi_lowpart_v32"): Use "+" for the operand 0 constraint, not "=". git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@134236 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/cris')
-rw-r--r--gcc/config/cris/cris.md8
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index 1200a2283cb..97353cd8df0 100644
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -2958,7 +2958,7 @@
(define_insn "*andhi_lowpart_non_v32"
[(set (strict_low_part
- (match_operand:HI 0 "register_operand" "=r,r, r,r,r,r"))
+ (match_operand:HI 0 "register_operand" "+r,r, r,r,r,r"))
(and:HI (match_operand:HI 1 "register_operand" "%0,0, 0,0,0,r")
(match_operand:HI 2 "general_operand" "r,Q>,L,O,g,!To")))]
"!TARGET_V32"
@@ -2974,7 +2974,7 @@
(define_insn "*andhi_lowpart_v32"
[(set (strict_low_part
- (match_operand:HI 0 "register_operand" "=r,r,r,r,r"))
+ (match_operand:HI 0 "register_operand" "+r,r,r,r,r"))
(and:HI (match_operand:HI 1 "register_operand" "%0,0,0,0,0")
(match_operand:HI 2 "general_operand" "r,Q>,L,O,g")))]
"TARGET_V32"
@@ -3025,7 +3025,7 @@
(define_insn "*andqi_lowpart_non_v32"
[(set (strict_low_part
- (match_operand:QI 0 "register_operand" "=r,r, r,r,r"))
+ (match_operand:QI 0 "register_operand" "+r,r, r,r,r"))
(and:QI (match_operand:QI 1 "register_operand" "%0,0, 0,0,r")
(match_operand:QI 2 "general_operand" "r,Q>,O,g,!To")))]
"!TARGET_V32"
@@ -3040,7 +3040,7 @@
(define_insn "*andqi_lowpart_v32"
[(set (strict_low_part
- (match_operand:QI 0 "register_operand" "=r,r,r,r"))
+ (match_operand:QI 0 "register_operand" "+r,r,r,r"))
(and:QI (match_operand:QI 1 "register_operand" "%0,0,0,0")
(match_operand:QI 2 "general_operand" "r,Q>,O,g")))]
"TARGET_V32"